From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Thu, 12 Jul 2012 17:49:29 -0500
Subject: [U-Boot] [PATCH] fsl: board EEPROM has the CRC in the wrong
	location
In-Reply-To: <1A7ED0F3-8897-4D3B-B7C6-0C71C3F38415@freescale.com>
References: <1342129594-7861-1-git-send-email-timur@freescale.com>
	<9F5356FB-8CA2-44DE-9089-64ABD82CA733@freescale.com>
	<4FFF51A9.5060500@freescale.com>
	<1A7ED0F3-8897-4D3B-B7C6-0C71C3F38415@freescale.com>
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On 07/12/2012 05:46 PM, sun york-R58495 wrote:
> 
> On Jul 12, 2012, at 3:37 PM, Scott Wood wrote:
> 
>> On 07/12/2012 05:03 PM, sun york-R58495 wrote:
>>> Timur,
>>>
>>> That patch itself is OK. But the comment is incorrect. We keep adding more mac addresses to this data structure. The CRC was at the end. The offset 0xCC was correct.
>>
>> Is there anything in the data structure to indicate that this growth has
>> happened?
>>
> Discussed with Timur. The MAX_NUM_PORT was chosen as 23, probably because of a wrong math. There is no reason to use that number. Now changing to 31 will use up all the EEPROM space and push the CRC to the end, offset 0xFC.

If the 0xCC version is already in real use, then this change should bump
the version number.

-Scott