From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 702DCC433F5 for ; Fri, 3 Dec 2021 17:39:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F13437A4CE; Fri, 3 Dec 2021 17:39:27 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9BD5673FD3; Fri, 3 Dec 2021 17:39:26 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10187"; a="323275781" X-IronPort-AV: E=Sophos;i="5.87,284,1631602800"; d="scan'208";a="323275781" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2021 09:39:26 -0800 X-IronPort-AV: E=Sophos;i="5.87,284,1631602800"; d="scan'208";a="678172334" Received: from ashunt-mobl2.ger.corp.intel.com (HELO [10.252.17.106]) ([10.252.17.106]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2021 09:39:24 -0800 Message-ID: <4ae2cef3-553a-d8df-72dc-585a5180d81d@intel.com> Date: Fri, 3 Dec 2021 17:39:22 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH v2 4/8] drm/i915/migrate: fix offset calculation Content-Language: en-GB To: Ramalingam C References: <20211203122426.2859679-1-matthew.auld@intel.com> <20211203122426.2859679-5-matthew.auld@intel.com> <20211203173026.GB27873@intel.com> From: Matthew Auld In-Reply-To: <20211203173026.GB27873@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bob.beckett@collabora.com, =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= , intel-gfx@lists.freedesktop.org, adrian.larumbe@collabora.com, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 03/12/2021 17:30, Ramalingam C wrote: > On 2021-12-03 at 12:24:22 +0000, Matthew Auld wrote: >> Ensure we add the engine base only after we calculate the qword offset >> into the PTE window. > > So we didn't hit this issue because we were always using the > engine->instance 0!? Yes, AFAIK. > > Looks good to me > > Reviewed-by: Ramalingam C > >> >> Signed-off-by: Matthew Auld >> Cc: Thomas Hellström >> Cc: Ramalingam C >> --- >> drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c >> index d553b76b1168..cb0bb3b94644 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c >> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c >> @@ -284,10 +284,10 @@ static int emit_pte(struct i915_request *rq, >> GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8); >> >> /* Compute the page directory offset for the target address range */ >> - offset += (u64)rq->engine->instance << 32; >> offset >>= 12; >> offset *= sizeof(u64); >> offset += 2 * CHUNK_SZ; >> + offset += (u64)rq->engine->instance << 32; >> >> cs = intel_ring_begin(rq, 6); >> if (IS_ERR(cs)) >> -- >> 2.31.1 >> From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF288C4332F for ; Fri, 3 Dec 2021 17:39:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C9B1C73FD3; Fri, 3 Dec 2021 17:39:27 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9BD5673FD3; Fri, 3 Dec 2021 17:39:26 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10187"; a="323275781" X-IronPort-AV: E=Sophos;i="5.87,284,1631602800"; d="scan'208";a="323275781" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2021 09:39:26 -0800 X-IronPort-AV: E=Sophos;i="5.87,284,1631602800"; d="scan'208";a="678172334" Received: from ashunt-mobl2.ger.corp.intel.com (HELO [10.252.17.106]) ([10.252.17.106]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2021 09:39:24 -0800 Message-ID: <4ae2cef3-553a-d8df-72dc-585a5180d81d@intel.com> Date: Fri, 3 Dec 2021 17:39:22 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Content-Language: en-GB To: Ramalingam C References: <20211203122426.2859679-1-matthew.auld@intel.com> <20211203122426.2859679-5-matthew.auld@intel.com> <20211203173026.GB27873@intel.com> From: Matthew Auld In-Reply-To: <20211203173026.GB27873@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Intel-gfx] [PATCH v2 4/8] drm/i915/migrate: fix offset calculation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= , intel-gfx@lists.freedesktop.org, adrian.larumbe@collabora.com, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On 03/12/2021 17:30, Ramalingam C wrote: > On 2021-12-03 at 12:24:22 +0000, Matthew Auld wrote: >> Ensure we add the engine base only after we calculate the qword offset >> into the PTE window. > > So we didn't hit this issue because we were always using the > engine->instance 0!? Yes, AFAIK. > > Looks good to me > > Reviewed-by: Ramalingam C > >> >> Signed-off-by: Matthew Auld >> Cc: Thomas Hellström >> Cc: Ramalingam C >> --- >> drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c >> index d553b76b1168..cb0bb3b94644 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c >> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c >> @@ -284,10 +284,10 @@ static int emit_pte(struct i915_request *rq, >> GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8); >> >> /* Compute the page directory offset for the target address range */ >> - offset += (u64)rq->engine->instance << 32; >> offset >>= 12; >> offset *= sizeof(u64); >> offset += 2 * CHUNK_SZ; >> + offset += (u64)rq->engine->instance << 32; >> >> cs = intel_ring_begin(rq, 6); >> if (IS_ERR(cs)) >> -- >> 2.31.1 >>