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a=rsa-sha256; c=simple/simple; d=flygoat.com; s=default; t=1596000799; bh=pP5wEsnC+JWtjjqIzTVCGa3BS/ZrHA3jsru+wXBd1PM=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=NJepf6ZuMDdtcotqU7e8PVlClotvOkR1wBIGMCT7XMdmrJhhC9rwvlSMIVQOiIREP zWpagHeW+n90GpYUJg4AGiVn/+Y7mjgehDXoL9j9+JScVmmYnFE0AkEgwgbhgKbsl0 6LtU9JX/KyJk1Oj9kBza/+6tzA8XCbHC68ed6UkQ= Subject: Re: [PATCH 5/5] irqchip: loongson-pch-pic: Fix the misused irq flow handler To: Huacai Chen , Thomas Bogendoerfer , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring Cc: linux-mips@vger.kernel.org, Fuxin Zhang , Huacai Chen References: <1596000130-8689-1-git-send-email-chenhc@lemote.com> <1596000130-8689-5-git-send-email-chenhc@lemote.com> From: Jiaxun Yang Message-ID: <4b1c4634-341d-352c-95ac-9a26f9e2fbcf@flygoat.com> Date: Wed, 29 Jul 2020 13:33:13 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.0.1 MIME-Version: 1.0 In-Reply-To: <1596000130-8689-5-git-send-email-chenhc@lemote.com> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 9337440847 X-Spamd-Result: default: False [1.40 / 10.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; R_DKIM_ALLOW(0.00)[flygoat.com:s=default]; MID_RHS_MATCH_FROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; R_SPF_SOFTFAIL(0.00)[~all]; HFILTER_HELO_BAREIP(3.00)[148.251.23.173,1]; ML_SERVERS(-3.10)[148.251.23.173]; DKIM_TRACE(0.00)[flygoat.com:+]; DMARC_POLICY_ALLOW(0.00)[flygoat.com,none]; RCPT_COUNT_SEVEN(0.00)[9]; DMARC_POLICY_ALLOW_WITH_FAILURES(0.00)[]; RCVD_NO_TLS_LAST(0.10)[]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:24940, ipnet:148.251.0.0/16, country:DE]; FREEMAIL_CC(0.00)[vger.kernel.org,lemote.com,gmail.com]; SUSPICIOUS_RECIPS(1.50)[]; RCVD_COUNT_TWO(0.00)[2] X-Rspamd-Server: mail20.mymailcheap.com Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org ÔÚ 2020/7/29 13:22, Huacai Chen дµÀ: > Loongson PCH PIC is a standard level triggered PIC, and it need to clear > interrupt during unmask. I had tested the driver with LS7A internal devices and it works. But there are some reports that the driver is missing interrupts from external PCIe slots. Your patch solved that. Although according to the manual it should be a fasteoi intc....... Tested-by: Jiaxun Yang > > Signed-off-by: Huacai Chen > --- > drivers/irqchip/irq-loongson-pch-pic.c | 15 ++++----------- > 1 file changed, 4 insertions(+), 11 deletions(-) > > diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c > index 2a05b93..61d06df 100644 > --- a/drivers/irqchip/irq-loongson-pch-pic.c > +++ b/drivers/irqchip/irq-loongson-pch-pic.c > @@ -64,15 +64,6 @@ static void pch_pic_bitclr(struct pch_pic *priv, int offset, int bit) > raw_spin_unlock(&priv->pic_lock); > } > > -static void pch_pic_eoi_irq(struct irq_data *d) > -{ > - u32 idx = PIC_REG_IDX(d->hwirq); > - struct pch_pic *priv = irq_data_get_irq_chip_data(d); > - > - writel(BIT(PIC_REG_BIT(d->hwirq)), > - priv->base + PCH_PIC_CLR + idx * 4); > -} > - > static void pch_pic_mask_irq(struct irq_data *d) > { > struct pch_pic *priv = irq_data_get_irq_chip_data(d); > @@ -85,6 +76,9 @@ static void pch_pic_unmask_irq(struct irq_data *d) > { > struct pch_pic *priv = irq_data_get_irq_chip_data(d); > > + writel(BIT(PIC_REG_BIT(d->hwirq)), > + priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4); > + > irq_chip_unmask_parent(d); > pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq); > } > @@ -124,7 +118,6 @@ static struct irq_chip pch_pic_irq_chip = { > .irq_mask = pch_pic_mask_irq, > .irq_unmask = pch_pic_unmask_irq, > .irq_ack = irq_chip_ack_parent, > - .irq_eoi = pch_pic_eoi_irq, > .irq_set_affinity = irq_chip_set_affinity_parent, > .irq_set_type = pch_pic_set_type, > }; > @@ -150,7 +143,7 @@ static int pch_pic_alloc(struct irq_domain *domain, unsigned int virq, > > irq_domain_set_info(domain, virq, hwirq, > &pch_pic_irq_chip, priv, > - handle_fasteoi_ack_irq, NULL, NULL); > + handle_level_irq, NULL, NULL); > irq_set_probe(virq); > > return 0;