From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 271D6C43331 for ; Tue, 24 Mar 2020 11:32:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0ACD02070A for ; Tue, 24 Mar 2020 11:32:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727334AbgCXLcN (ORCPT ); Tue, 24 Mar 2020 07:32:13 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34120 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727233AbgCXLcM (ORCPT ); Tue, 24 Mar 2020 07:32:12 -0400 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D4455B7EA30AA5648347; Tue, 24 Mar 2020 19:32:04 +0800 (CST) Received: from [127.0.0.1] (10.173.222.27) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.487.0; Tue, 24 Mar 2020 19:31:59 +0800 Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field To: Zhenyu Ye , , , , , , , , CC: , , , , , , , References: <20200321121621.1600-1-yezhenyu2@huawei.com> From: Zenghui Yu Message-ID: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> Date: Tue, 24 Mar 2020 19:31:57 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20200321121621.1600-1-yezhenyu2@huawei.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Zhenyu, On 2020/3/21 20:16, Zhenyu Ye wrote: > -- > ChangeList: > v3: > use vma->vm_flags to replace mm->context.flags. > > v2: > build the patch on Marc's NV series[1]. > > v1: > add support for TTL field in arm64. > > -- > ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate > the level of translation table walk holding the leaf entry for the > address that is being invalidated. Hardware can use this information > to determine if there was a risk of splintering. > > Marc has provided basic support for ARM64-TTL features on his > NV series[1] patches. NV is a large feature, however, only > patches 62[2] and 67[3] are need by this patch set. > ** You only need read those two patches before review this patch. ** It'd be good if you can put the whole thing into a series, otherwise people will have difficulty when reviewing and testing it... I haven't tracked the previous versions. If Marc is OK to share the two patches below [2][3], I'd suggest you to pick them up, add them in your series, rebase on top of mainline and resend it. Thanks, Zenghui > > Some of this patch depends on a feature powered by @Will Deacon > two years ago, which tracking the level of page tables in mm_gather. > See more in commit a6d60245. > > [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 > [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ > [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ > > Zhenyu Ye (4): > arm64: Add level-hinted TLB invalidation helper to tlbi_user > mm: Add page table level flags to vm_flags > arm64: tlb: Use translation level hint in vm_flags > mm: Set VM_LEVEL flags in some tlb_flush functions > > arch/arm64/include/asm/mmu.h | 2 ++ > arch/arm64/include/asm/tlb.h | 12 +++++++++ > arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- > arch/arm64/mm/hugetlbpage.c | 4 +-- > arch/arm64/mm/mmu.c | 14 ++++++++++ > include/asm-generic/pgtable.h | 16 +++++++++-- > include/linux/mm.h | 10 +++++++ > include/trace/events/mmflags.h | 15 ++++++++++- > mm/huge_memory.c | 8 +++++- > 9 files changed, 113 insertions(+), 12 deletions(-) > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zenghui Yu Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field Date: Tue, 24 Mar 2020 19:31:57 +0800 Message-ID: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> References: <20200321121621.1600-1-yezhenyu2@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Return-path: Received: from szxga06-in.huawei.com ([45.249.212.32]:34120 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727233AbgCXLcM (ORCPT ); Tue, 24 Mar 2020 07:32:12 -0400 In-Reply-To: <20200321121621.1600-1-yezhenyu2@huawei.com> Content-Language: en-US Sender: linux-arch-owner@vger.kernel.org List-ID: To: Zhenyu Ye , will@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, aneesh.kumar@linux.ibm.com, maz@kernel.org, steven.price@arm.com, broonie@kernel.org, guohanjun@huawei.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, linux-arm-kernel@lists.infradead.org Hi Zhenyu, On 2020/3/21 20:16, Zhenyu Ye wrote: > -- > ChangeList: > v3: > use vma->vm_flags to replace mm->context.flags. > > v2: > build the patch on Marc's NV series[1]. > > v1: > add support for TTL field in arm64. > > -- > ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate > the level of translation table walk holding the leaf entry for the > address that is being invalidated. Hardware can use this information > to determine if there was a risk of splintering. > > Marc has provided basic support for ARM64-TTL features on his > NV series[1] patches. NV is a large feature, however, only > patches 62[2] and 67[3] are need by this patch set. > ** You only need read those two patches before review this patch. ** It'd be good if you can put the whole thing into a series, otherwise people will have difficulty when reviewing and testing it... I haven't tracked the previous versions. If Marc is OK to share the two patches below [2][3], I'd suggest you to pick them up, add them in your series, rebase on top of mainline and resend it. Thanks, Zenghui > > Some of this patch depends on a feature powered by @Will Deacon > two years ago, which tracking the level of page tables in mm_gather. > See more in commit a6d60245. > > [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 > [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ > [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ > > Zhenyu Ye (4): > arm64: Add level-hinted TLB invalidation helper to tlbi_user > mm: Add page table level flags to vm_flags > arm64: tlb: Use translation level hint in vm_flags > mm: Set VM_LEVEL flags in some tlb_flush functions > > arch/arm64/include/asm/mmu.h | 2 ++ > arch/arm64/include/asm/tlb.h | 12 +++++++++ > arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- > arch/arm64/mm/hugetlbpage.c | 4 +-- > arch/arm64/mm/mmu.c | 14 ++++++++++ > include/asm-generic/pgtable.h | 16 +++++++++-- > include/linux/mm.h | 10 +++++++ > include/trace/events/mmflags.h | 15 ++++++++++- > mm/huge_memory.c | 8 +++++- > 9 files changed, 113 insertions(+), 12 deletions(-) > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E0AEC43331 for ; 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Tue, 24 Mar 2020 19:31:59 +0800 Subject: Re: [RFC PATCH v3 0/4] arm64: tlb: add support for TTL field To: Zhenyu Ye , , , , , , , , References: <20200321121621.1600-1-yezhenyu2@huawei.com> From: Zenghui Yu Message-ID: <4e3d42d9-7c57-3659-edbe-1e59ca5b04ea@huawei.com> Date: Tue, 24 Mar 2020 19:31:57 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20200321121621.1600-1-yezhenyu2@huawei.com> Content-Language: en-US X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200324_043220_030151_5D758A70 X-CRM114-Status: GOOD ( 18.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Zhenyu, On 2020/3/21 20:16, Zhenyu Ye wrote: > -- > ChangeList: > v3: > use vma->vm_flags to replace mm->context.flags. > > v2: > build the patch on Marc's NV series[1]. > > v1: > add support for TTL field in arm64. > > -- > ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate > the level of translation table walk holding the leaf entry for the > address that is being invalidated. Hardware can use this information > to determine if there was a risk of splintering. > > Marc has provided basic support for ARM64-TTL features on his > NV series[1] patches. NV is a large feature, however, only > patches 62[2] and 67[3] are need by this patch set. > ** You only need read those two patches before review this patch. ** It'd be good if you can put the whole thing into a series, otherwise people will have difficulty when reviewing and testing it... I haven't tracked the previous versions. If Marc is OK to share the two patches below [2][3], I'd suggest you to pick them up, add them in your series, rebase on top of mainline and resend it. Thanks, Zenghui > > Some of this patch depends on a feature powered by @Will Deacon > two years ago, which tracking the level of page tables in mm_gather. > See more in commit a6d60245. > > [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-5.6-rc1 > [2] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-63-maz@kernel.org/ > [3] https://lore.kernel.org/linux-arm-kernel/20200211174938.27809-68-maz@kernel.org/ > > Zhenyu Ye (4): > arm64: Add level-hinted TLB invalidation helper to tlbi_user > mm: Add page table level flags to vm_flags > arm64: tlb: Use translation level hint in vm_flags > mm: Set VM_LEVEL flags in some tlb_flush functions > > arch/arm64/include/asm/mmu.h | 2 ++ > arch/arm64/include/asm/tlb.h | 12 +++++++++ > arch/arm64/include/asm/tlbflush.h | 44 ++++++++++++++++++++++++++----- > arch/arm64/mm/hugetlbpage.c | 4 +-- > arch/arm64/mm/mmu.c | 14 ++++++++++ > include/asm-generic/pgtable.h | 16 +++++++++-- > include/linux/mm.h | 10 +++++++ > include/trace/events/mmflags.h | 15 ++++++++++- > mm/huge_memory.c | 8 +++++- > 9 files changed, 113 insertions(+), 12 deletions(-) > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel