From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Wu Date: Sat, 9 May 2020 14:56:37 +0800 Subject: [PATCH 8/8] net: gmac_rockchip: Add dwc_eth_qos support In-Reply-To: <017cf400-4866-dfbd-023c-73451a7baafb@wwwdotorg.org> References: <20200430103656.29728-1-david.wu@rock-chips.com> <20200430104527.31248-1-david.wu@rock-chips.com> <017cf400-4866-dfbd-023c-73451a7baafb@wwwdotorg.org> Message-ID: <4e59a875-201c-d95d-2666-09269078f004@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stephen, ? 2020/5/1 ??6:52, Stephen Warren ??: > I'm really confused; with a filename like gmac_rockchip.c that sounds > like it's driver for a MAC device. DWC EQoS is also a MAC device. The > two shouldn't be related or coupled in any way. > > I think what you need is to completely drop this patch (and the patch > which creates dwc_eth_qos.h), and instead make the DWC EQoS driver > itself directly support the Rockchip SoC by adding RK's compatible value > to the list of compatible values that the EQoS driver supports, along > with new probe functions etc. > > Maybe this requires splitting some PHY code out of gmac_rockchip into a > common/separate PHY driver? I haven't looked at the code to know if > that's required. I think this relationship is like the current designware.c and gmac_rockchip.c, except that the designware driver becomes DWC EQoS. In fact, most of the code is the same, because it is the same controller, and there are a few differences related to Soc implemented in gmac_rockchip.c, this is the purpose of my series of patches, and the code must be compatible with the previous Rockchip Socs.