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dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id EFF836B0003; Fri, 20 Sep 2019 20:52:49 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id EB04E6B0006; Fri, 20 Sep 2019 20:52:49 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D9E9B6B0007; Fri, 20 Sep 2019 20:52:49 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0119.hostedemail.com [216.40.44.119]) by kanga.kvack.org (Postfix) with ESMTP id B275B6B0003 for ; Fri, 20 Sep 2019 20:52:49 -0400 (EDT) Received: from smtpin15.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay01.hostedemail.com (Postfix) with SMTP id 45FC3180AD803 for ; Sat, 21 Sep 2019 00:52:49 +0000 (UTC) X-FDA: 75957102858.15.stem64_185f67d8ac552 X-HE-Tag: stem64_185f67d8ac552 X-Filterd-Recvd-Size: 7841 Received: from hqemgate14.nvidia.com (hqemgate14.nvidia.com [216.228.121.143]) by imf34.hostedemail.com (Postfix) with ESMTP for ; Sat, 21 Sep 2019 00:52:47 +0000 (UTC) Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 20 Sep 2019 17:52:48 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 20 Sep 2019 17:52:45 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 20 Sep 2019 17:52:45 -0700 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Sat, 21 Sep 2019 00:48:23 +0000 Received: from [10.110.48.28] (10.124.1.5) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Sat, 21 Sep 2019 00:48:22 +0000 Subject: Re: [PATCH v2 11/11] powerpc/mm/book3s64/pgtable: Uses counting method to skip serializing To: Leonardo Bras , , , Linux-MM CC: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Arnd Bergmann , Aneesh Kumar K.V , "Christophe Leroy" , Andrew Morton , Dan Williams , Nicholas Piggin , Mahesh Salgaonkar , Thomas Gleixner , Richard Fontana , Ganesh Goudar , Allison Randal , "Greg Kroah-Hartman" , Mike Rapoport , YueHaibing , Ira Weiny , Jason Gunthorpe , Keith Busch References: <20190920195047.7703-1-leonardo@linux.ibm.com> <20190920195047.7703-12-leonardo@linux.ibm.com> <1b39eaa7-751d-40bc-d3d7-41aaa15be42a@nvidia.com> <24863d8904c6e05e5dd48cab57db4274675ae654.camel@linux.ibm.com> X-Nvconfidentiality: public From: John Hubbard Message-ID: <4ea26ffb-ad03-bdff-7893-95332b22a5fd@nvidia.com> Date: Fri, 20 Sep 2019 17:48:22 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <24863d8904c6e05e5dd48cab57db4274675ae654.camel@linux.ibm.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1569027168; bh=mxTrUqQC0LpHtZwDDpptnnmD6mLkuvDFdIcthA0LOFs=; h=X-PGP-Universal:Subject:To:CC:References:X-Nvconfidentiality:From: Message-ID:Date:User-Agent:MIME-Version:In-Reply-To: X-Originating-IP:X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=rq0bduDxx4OWdKvbShQZnzluimNygZGHLda9E0OPFQ08wPpjgp+RqimmmAwRCDzLa 2uBX+v+EEZwmmxx7dXxlJHiFqLEbW0EvADvxbiU4KoGB8vQL6CjIAs0uLiELRLY2Ys Mr49OULj0v7sG9XexjqHd89nasUVCJaD7YNg5K0nEmt48jjl8ZU/OEFZOxsEZMNXiV Zhu1NyA4QIuhnXWxDtz2bsykXNzEVwgPam/TwYHQluNP5aWO4RCgm31RBGk8cv3ko5 5MgNY+Uk6dsPZozW1WhaEpz/zoHb3o7sZWIEfP/yMYaP46Pis+vEnxVeupzhoAVZQ8 q6rXw+IIUmmUw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 9/20/19 1:28 PM, Leonardo Bras wrote: > On Fri, 2019-09-20 at 13:11 -0700, John Hubbard wrote: >> On 9/20/19 12:50 PM, Leonardo Bras wrote: >>> Skips slow part of serialize_against_pte_lookup if there is no running >>> lockless pagetable walk. >>> >>> Signed-off-by: Leonardo Bras >>> --- >>> arch/powerpc/mm/book3s64/pgtable.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c >>> index 13239b17a22c..41ca30269fa3 100644 >>> --- a/arch/powerpc/mm/book3s64/pgtable.c >>> +++ b/arch/powerpc/mm/book3s64/pgtable.c >>> @@ -95,7 +95,8 @@ static void do_nothing(void *unused) >>> void serialize_against_pte_lookup(struct mm_struct *mm) >>> { >>> smp_mb(); >>> - smp_call_function_many(mm_cpumask(mm), do_nothing, NULL, 1); >>> + if (running_lockless_pgtbl_walk(mm)) >>> + smp_call_function_many(mm_cpumask(mm), do_nothing, NULL, 1); >> >> Hi, >> >> If you do this, then you are left without any synchronization. So it will >> have race conditions: a page table walk could begin right after the above >> check returns "false", and then code such as hash__pmdp_huge_get_and_clear() >> will continue on right away, under the false assumption that it has let >> all the current page table walks complete. >> >> The current code uses either interrupts or RCU to synchronize, and in >> either case, you end up scheduling something on each CPU. If you remove >> that entirely, I don't see anything left. ("Pure" atomic counting is not >> a synchronization technique all by itself.) >> >> thanks, > > Hello John, > Thanks for the fast feedback. > > See, before calling serialize_against_pte_lookup(), there is always an > update or clear on the pmd. So, if a page table walk begin right after > the check returns "false", there is no problem, since it will use the > updated pmd. > > Think about serialize, on a process with a bunch of cpus. After you > check the last processor (wait part), there is no guarantee that the > first one is not starting a lockless pagetable walk. > > The same mechanism protect both methods. > > Does it make sense? > Yes, after working through this with Mark Hairgrove, I think I finally realize that the new code will allow existing gup_fast() readers to drain, before proceeding. So that technically works (ignoring issues such as whether it's desirable to use this approach, vs. for example batching the THP updates, etc), I agree. (And please ignore my other response that asked if the counting was helping at all--I see that it does.) However, Mark pointed out a pre-existing question, which neither of us could figure out: are the irq disable/enable calls effective, given that they are (apparently) not memory barriers? Given this claim from Documentation/memory-barriers.txt: INTERRUPT DISABLING FUNCTIONS ----------------------------- Functions that disable interrupts (ACQUIRE equivalent) and enable interrupts (RELEASE equivalent) will act as compiler barriers only. So if memory or I/O barriers are required in such a situation, they must be provided from some other means. ...and given both the preexisting code, and the code you've added: mm/gup.c: atomic_inc(readers); /* new code */ local_irq_disable(); gup_pgd_range(); ...read page tables local_irq_enable(); atomic_dec(readers); /* new code */ ...if the page table reads are allowed to speculatively happen *outside* of the irq enable/disable calls (which could happen if there are no run-time memory barriers in the above code), then nothing works anymore. So it seems that full memory barriers (not just compiler barriers) are required. If the irq enable/disable somehow provides that, then your new code just goes along for the ride and Just Works. (You don't have any memory barriers in start_lockless_pgtbl_walk() / end_lockless_pgtbl_walk(), just the compiler barriers provided by the atomic inc/dec.) So it's really a pre-existing question about the correctness of the gup_fast() irq disabling approach. +CC linux-mm thanks, -- John Hubbard NVIDIA From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCDF2C3A5A2 for ; Sat, 21 Sep 2019 00:54:50 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CF5B820C01 for ; Sat, 21 Sep 2019 00:54:49 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Sat, 21 Sep 2019 00:48:22 +0000 Subject: Re: [PATCH v2 11/11] powerpc/mm/book3s64/pgtable: Uses counting method to skip serializing To: Leonardo Bras , , , Linux-MM References: <20190920195047.7703-1-leonardo@linux.ibm.com> <20190920195047.7703-12-leonardo@linux.ibm.com> <1b39eaa7-751d-40bc-d3d7-41aaa15be42a@nvidia.com> <24863d8904c6e05e5dd48cab57db4274675ae654.camel@linux.ibm.com> X-Nvconfidentiality: public From: John Hubbard Message-ID: <4ea26ffb-ad03-bdff-7893-95332b22a5fd@nvidia.com> Date: Fri, 20 Sep 2019 17:48:22 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <24863d8904c6e05e5dd48cab57db4274675ae654.camel@linux.ibm.com> X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To DRHQMAIL107.nvidia.com (10.27.9.16) Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1569027168; bh=mxTrUqQC0LpHtZwDDpptnnmD6mLkuvDFdIcthA0LOFs=; h=X-PGP-Universal:Subject:To:CC:References:X-Nvconfidentiality:From: Message-ID:Date:User-Agent:MIME-Version:In-Reply-To: X-Originating-IP:X-ClientProxiedBy:Content-Type:Content-Language: Content-Transfer-Encoding; b=rq0bduDxx4OWdKvbShQZnzluimNygZGHLda9E0OPFQ08wPpjgp+RqimmmAwRCDzLa 2uBX+v+EEZwmmxx7dXxlJHiFqLEbW0EvADvxbiU4KoGB8vQL6CjIAs0uLiELRLY2Ys Mr49OULj0v7sG9XexjqHd89nasUVCJaD7YNg5K0nEmt48jjl8ZU/OEFZOxsEZMNXiV Zhu1NyA4QIuhnXWxDtz2bsykXNzEVwgPam/TwYHQluNP5aWO4RCgm31RBGk8cv3ko5 5MgNY+Uk6dsPZozW1WhaEpz/zoHb3o7sZWIEfP/yMYaP46Pis+vEnxVeupzhoAVZQ8 q6rXw+IIUmmUw== X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Gunthorpe , Thomas Gleixner , Arnd Bergmann , Greg Kroah-Hartman , YueHaibing , Keith Busch , Nicholas Piggin , Mike Rapoport , Mahesh Salgaonkar , Richard Fontana , Paul Mackerras , "Aneesh Kumar K.V" , Ganesh Goudar , Andrew Morton , Ira Weiny , Dan Williams , Allison Randal Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 9/20/19 1:28 PM, Leonardo Bras wrote: > On Fri, 2019-09-20 at 13:11 -0700, John Hubbard wrote: >> On 9/20/19 12:50 PM, Leonardo Bras wrote: >>> Skips slow part of serialize_against_pte_lookup if there is no running >>> lockless pagetable walk. >>> >>> Signed-off-by: Leonardo Bras >>> --- >>> arch/powerpc/mm/book3s64/pgtable.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/powerpc/mm/book3s64/pgtable.c b/arch/powerpc/mm/book3s64/pgtable.c >>> index 13239b17a22c..41ca30269fa3 100644 >>> --- a/arch/powerpc/mm/book3s64/pgtable.c >>> +++ b/arch/powerpc/mm/book3s64/pgtable.c >>> @@ -95,7 +95,8 @@ static void do_nothing(void *unused) >>> void serialize_against_pte_lookup(struct mm_struct *mm) >>> { >>> smp_mb(); >>> - smp_call_function_many(mm_cpumask(mm), do_nothing, NULL, 1); >>> + if (running_lockless_pgtbl_walk(mm)) >>> + smp_call_function_many(mm_cpumask(mm), do_nothing, NULL, 1); >> >> Hi, >> >> If you do this, then you are left without any synchronization. So it will >> have race conditions: a page table walk could begin right after the above >> check returns "false", and then code such as hash__pmdp_huge_get_and_clear() >> will continue on right away, under the false assumption that it has let >> all the current page table walks complete. >> >> The current code uses either interrupts or RCU to synchronize, and in >> either case, you end up scheduling something on each CPU. If you remove >> that entirely, I don't see anything left. ("Pure" atomic counting is not >> a synchronization technique all by itself.) >> >> thanks, > > Hello John, > Thanks for the fast feedback. > > See, before calling serialize_against_pte_lookup(), there is always an > update or clear on the pmd. So, if a page table walk begin right after > the check returns "false", there is no problem, since it will use the > updated pmd. > > Think about serialize, on a process with a bunch of cpus. After you > check the last processor (wait part), there is no guarantee that the > first one is not starting a lockless pagetable walk. > > The same mechanism protect both methods. > > Does it make sense? > Yes, after working through this with Mark Hairgrove, I think I finally realize that the new code will allow existing gup_fast() readers to drain, before proceeding. So that technically works (ignoring issues such as whether it's desirable to use this approach, vs. for example batching the THP updates, etc), I agree. (And please ignore my other response that asked if the counting was helping at all--I see that it does.) However, Mark pointed out a pre-existing question, which neither of us could figure out: are the irq disable/enable calls effective, given that they are (apparently) not memory barriers? Given this claim from Documentation/memory-barriers.txt: INTERRUPT DISABLING FUNCTIONS ----------------------------- Functions that disable interrupts (ACQUIRE equivalent) and enable interrupts (RELEASE equivalent) will act as compiler barriers only. So if memory or I/O barriers are required in such a situation, they must be provided from some other means. ...and given both the preexisting code, and the code you've added: mm/gup.c: atomic_inc(readers); /* new code */ local_irq_disable(); gup_pgd_range(); ...read page tables local_irq_enable(); atomic_dec(readers); /* new code */ ...if the page table reads are allowed to speculatively happen *outside* of the irq enable/disable calls (which could happen if there are no run-time memory barriers in the above code), then nothing works anymore. So it seems that full memory barriers (not just compiler barriers) are required. If the irq enable/disable somehow provides that, then your new code just goes along for the ride and Just Works. (You don't have any memory barriers in start_lockless_pgtbl_walk() / end_lockless_pgtbl_walk(), just the compiler barriers provided by the atomic inc/dec.) So it's really a pre-existing question about the correctness of the gup_fast() irq disabling approach. +CC linux-mm thanks, -- John Hubbard NVIDIA