From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 19 Oct 2017 17:51:23 +0200 Subject: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree In-Reply-To: <1508427367.2676.20.camel@synopsys.com> References: <20171013151817.4588-1-Eugeniy.Paltsev@synopsys.com> <1508247162.2676.13.camel@synopsys.com> <4881796E12491D4BB15146FE0209CE6467F9F602@DE02WEMBXB.internal.synopsys.com> <1508427367.2676.20.camel@synopsys.com> Message-ID: <4f3a751a-435c-76ae-9ec4-eb1786804508@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote: > On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote: >> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin >> wrote: >>> Hi Jagan, >>> >>>> -----Original Message----- >>>> From: Eugeniy Paltsev [mailto:paltsev at synopsys.com] >>>> Sent: Tuesday, October 17, 2017 4:33 PM >>>> To: jagannadh.teki at gmail.com >>>> Cc: u-boot at lists.denx.de; uboot-snps-arc at synopsys.com >>>> Subject: [uboot-snps-arc] Re: [PATCH v2] DW SPI: Get clock value from = Device Tree >>>>> >>>>> How hard it is to make others to use clock manager? do you have any l= ist? >>>> >>>> clock_manager.h is an old (and non-generic) way to deal with different= clocks. >>>> For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h provid= es >>>> cm_get_spi_controller_clk_hz function to deal with spi controller cloc= k. >>>> >>>> But today we have another, linux-like alternative: to bind clocks via = device tree >>>> and manipulate with clocks via generic functions provided by clk.h >>>> >>>> In this patch I added option to get clock via device tree using standa= rd bindings >>>> and restrict clock_manager.h functions usage only to targets which sti= ll use it, >>>> so new targets can simply bind clock via device tree and they do not n= eed to >>>> implement/define something in clock_manager.h >>>> >>>> So we don't need to make others to use clock manager :) >>> >>> Maybe it worth trying the other way around and think about switching SO= CFPGA platforms to >>> generic clk framework? >> >> Yes, ie what exactly I thought of, thanks! >=20 > I checked cm_get_spi_controller_clk_hz implementation in SOCFPGA_GEN5 and > SOCFPGA_ARRIA10: we can't simply replace it with "fixed-clock" driver as = it=C2=A0 > manipulate with real hardware. > The only way to do it is to replace SOCFPGA* clock manager functions by r= eal > clock driver. >=20 > And given I don't have mentioned hardware so I barely can help with > those improvements on SOCFPGA. That said if there're no short-term plans = to > switch SOCFPGA to clk framework maybe we'll be OK with my workaround with= #ifdefs? Wait for Dinh's reply ... --=20 Best regards, Marek Vasut