From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michal Simek Date: Thu, 12 Mar 2020 11:32:22 +0100 Subject: ZynqMP boot: no messages from SPL other than "Debug uart enabled" In-Reply-To: <77460fd1-f86d-fd53-66af-28d16fe395a1@gmail.com> References: <0f9a6b47-110c-c2f8-ec40-72106ed3272d@xilinx.com> <77460fd1-f86d-fd53-66af-28d16fe395a1@gmail.com> Message-ID: <4fcae7a6-1156-d868-3463-424368cf7b7f@xilinx.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 12. 03. 20 10:12, Major A wrote: > Hi Michal, > >> the issue is likely related to incorrect DDR configuration. >> BSS and Malloc space are in DDR. > >> rev1.1 has different DDR sodimm module then rev1.0. > > Thanks, this never occurred to me as Xilinx says to use rev1.0 software > for rev1.1 boards, so that's what I did. First of all I sent v2 because of dt changes to see 1.1 revision and I have also tested it on real HW. Yes normally it works like that newer board revision works with previous versions. But 1.1 is different case. >> I have generated psu init from vivado 2019.2 for 1.1 revision and send >> it to mailing list. I didn't test it on hw but please test it and let me >> know. > > I had already done that in the past (feed Vivado 2019.2 psu file into > u-boot), with no success.? Unfortunately, your patch doesn't help > either, the behaviour is still exactly the same as before. > >> Build it like this. >> export DEVICE_TREE="zynqmp-zcu102-rev1.1" >> make xilinx_zynqmp_virt_defconfig >> make -j > > For some reason, that's no enough: I have to manually set > CONFIG_DEVICE_TREE because xilinx_zynqmp_virt_defconfig sets it wrong. > In any case, behaviour is exactly the same as before. With latest my queue it should be enough. https://github.com/michalsimek/u-boot/tree/mainline-v20200312 But I think that latest mainline should setup default in ITS properly. You can check it by looking at u-boot.its when build is done and find default configuration option which should point to 1.1 dt. Here are jtag steps I have run. Thanks, Michal connect targets -set -filter {name =~ "PSU"} set status [mrd -force -value 0xFFCA0038] set status [expr $status | 0x1C0] mwr -force 0xFFCA0038 $status targets -set -filter {name =~ "MicroBlaze PMU"} dow pmu.elf con targets -set -filter {name =~ "PSU"} mwr 0xffff0000 0x14000000 mask_write 0xFD1A0104 0x501 0x0 after 1000 targets -set -filter {name =~ "Cortex-A53 #0"} stop dow -data u-boot-spl-dtb.bin 0xfffc0000 memmap -file u-boot-spl rwr pc 0xfffc0000 bpadd -addr &udelay if { [catch {con -block -timeout 3000} msg] } { puts "err: $msg" exit # do something to handle the error } bpremove 0 dow -data u-boot.itb 0x10000000 con