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From: Sanjay R Mehta <sanmehta@amd.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Sanjay R Mehta <Sanju.Mehta@amd.com>,
	andreas.noever@gmail.com, michael.jamet@intel.com,
	bhelgaas@google.com, YehezkelShB@gmail.com,
	Basavaraj.Natikar@amd.com, linux-usb@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/4] PCI: Add AMD USB4 host router device IDs
Date: Tue, 3 Aug 2021 17:56:23 +0530	[thread overview]
Message-ID: <4feb675d-7b5c-e5a3-4b01-d22289a8ad32@amd.com> (raw)
In-Reply-To: <YQkQTWxWK3YzFYeJ@lahna>



On 8/3/2021 3:15 PM, Mika Westerberg wrote:
> [CAUTION: External Email]
> 
> Hi,
> 
> I have one more comment, see below.
> 
> On Mon, Aug 02, 2021 at 11:39:32PM +0530, Sanjay R Mehta wrote:
>>
>>
>> On 8/2/2021 8:42 PM, Mika Westerberg wrote:
>>> [CAUTION: External Email]
>>>
>>> On Mon, Aug 02, 2021 at 07:58:17AM -0500, Sanjay R Mehta wrote:
>>>> From: Sanjay R Mehta <sanju.mehta@amd.com>
>>>>
>>>> This patch enables support for AMD USB4 host router.
>>>>
>>>> Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
>>>> Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
>>>> ---
>>>>  drivers/thunderbolt/nhi.c | 4 ++++
>>>>  include/linux/pci_ids.h   | 2 ++
>>>>  2 files changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
>>>> index fa44332..d7d9c4b 100644
>>>> --- a/drivers/thunderbolt/nhi.c
>>>> +++ b/drivers/thunderbolt/nhi.c
>>>> @@ -1338,6 +1338,10 @@ static struct pci_device_id nhi_ids[] = {
>>>>       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADL_NHI1),
>>>>         .driver_data = (kernel_ulong_t)&icl_nhi_ops },
>>>>
>>>> +     /* AMD USB4 host */
>>>> +     { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_USB4_HIA0) },
>>>> +     { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_USB4_HIA1) },
>>>> +
> 
> I wonder if AMD USB4 controller exposes the USB4 PCI class ID? If that's
> the case and you don't need any special quirking like Intel does then we
> don't need to add any PCI IDs here and allow the below line to match.
> 
> This is actually what I hope we get eventually in Intel HW too.

yes, make sense. Will remove this from the series.

Thanks,
Sanjay

> 
>>>>       /* Any USB4 compliant host */
>>>>       { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_USB4, ~0) },

  reply	other threads:[~2021-08-03 12:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-02 12:58 [PATCH 0/4] Add support for AMD USB4 and bug fixes Sanjay R Mehta
2021-08-02 12:58 ` [PATCH 1/4] PCI: Add AMD USB4 host router device IDs Sanjay R Mehta
2021-08-02 15:12   ` Mika Westerberg
2021-08-02 18:09     ` Sanjay R Mehta
2021-08-03  9:45       ` Mika Westerberg
2021-08-03 12:26         ` Sanjay R Mehta [this message]
2021-08-02 12:58 ` [PATCH 2/4] thunderbolt: Handle INTR when Disable ISR auto clear bit set Sanjay R Mehta
2021-08-02 15:22   ` Mika Westerberg
2021-08-02 18:15     ` Sanjay R Mehta
2021-08-02 12:58 ` [PATCH 3/4] thunderbolt: Fix adapter init handling during switch add Sanjay R Mehta
2021-08-02 15:26   ` Mika Westerberg
2021-08-02 18:53     ` Sanjay R Mehta
2021-08-03  9:05       ` Mika Westerberg
2021-08-03 12:29         ` Sanjay R Mehta
2021-08-02 12:58 ` [PATCH 4/4] thunderbolt: Fix port linking by checking all adapters Sanjay R Mehta
2021-08-02 15:10 ` [PATCH 0/4] Add support for AMD USB4 and bug fixes Mika Westerberg

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