From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44046) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwsNu-00058r-2L for qemu-devel@nongnu.org; Thu, 02 Aug 2012 06:12:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SwsNs-0002by-LN for qemu-devel@nongnu.org; Thu, 02 Aug 2012 06:12:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44894) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SwsNs-0002bn-Df for qemu-devel@nongnu.org; Thu, 02 Aug 2012 06:12:00 -0400 Message-ID: <501A5268.2060501@redhat.com> Date: Thu, 02 Aug 2012 12:11:52 +0200 From: Igor Mammedov MIME-Version: 1.0 References: <1343049748-11539-1-git-send-email-imammedo@redhat.com> <1343049748-11539-2-git-send-email-imammedo@redhat.com> <5019366B.1050605@suse.de> In-Reply-To: <5019366B.1050605@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/2] target-i386: move cpu halted decision into x86_cpu_reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: peter.maydell@linaro.org, aliguori@us.ibm.com, ehabkost@redhat.com, gleb@redhat.com, Jan Kiszka , mtosatti@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, blauwirbel@gmail.com, avi@redhat.com, pbonzini@redhat.com On 08/01/2012 04:00 PM, Andreas F=C3=A4rber wrote: > Am 23.07.2012 15:22, schrieb Igor Mammedov: >> MP initialization protocol differs between cpu families, and for P6 an= d >> onward models it is up to CPU to decide if it will be BSP using this >> protocol, so try to model this. However there is no point in implement= ing >> MP initialization protocol in qemu. Thus first CPU is always marked as= BSP. >> >> This patch: >> - moves decision to designate BSP from board into cpu, making cpu >> self-sufficient in this regard. Later it will allow to cleanup hw/pc.c >> and remove cpu_reset and wrappers from there. >> - stores flag that CPU is BSP in IA32_APIC_BASE to model behavior >> described in Inted SDM vol 3a part 1 chapter 8.4.1 >> - uses MSR_IA32_APICBASE_BSP flag in apic_base for checking if cpu i= s BSP >> >> patch is based on Jan Kiszka's proposal: >> http://thread.gmane.org/gmane.comp.emulators.qemu/100806 >> >> Signed-off-by: Igor Mammedov >> >> --- >> Changelog: >> v2: >> - fix build for i386-linux-user >> spotted-by: Peter Maydell >> v3: >> - style change requested by Andreas F=C3=A4rber >> >> v4: >> - reuse cpu_is_bsp() rather than open code check if apicbase has B= SP bit set >> requested by Gleb Natapov >> - hijacked patch [1] to use X86CPU instead of CPUX86State in cpu_i= s_bsp() >> >> v5: >> - move Changelog under --- >> requested by: Peter Maydell >> >> 1) [PATCH qom-next 06/59] pc: Pass X86CPU to cpu_is_bsp() >> SoB: Andreas F=C3=A4rber >> http://lists.gnu.org/archive/html/qemu-devel/2012-05/msg03185.html > > Reviewed-by: Andreas F=C3=A4rber > > I'm fine with this patch, including the squashing of my trivial patch > without SoB, but would appreciate someone who knows the APIC (Jan?) to > add an explicit Acked-by. Andreas, I apologise for not including explicitly your SoB here. Next time I'll=20 ask if SoB should be included. > Andreas >