From mboxrd@z Thu Jan  1 00:00:00 1970
From: Liu Dave-R63238 <r63238@freescale.com>
Date: Fri, 17 Sep 2010 16:40:23 +0800
Subject: [U-Boot] P4080 Reset Vector
In-Reply-To: <loom.20100917T095532-400@post.gmane.org>
References: <29641685.post@talk.nabble.com><loom.20100910T090157-423@post.gmane.org><2AE89BEB-B902-4BF9-8EC5-9AEAC8DD9870@kernel.crashing.org><loom.20100914T052720-40@post.gmane.org><50260780A060C94D9E98AC2670936D6020BB56@zch01exm21.fsl.freescale.net><loom.20100915T100549-687@post.gmane.org><50260780A060C94D9E98AC2670936D6020BD42@zch01exm21.fsl.freescale.net>
	<loom.20100917T095532-400@post.gmane.org>
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> It look same as other PQ2/3 which using BR0/OR0 to set boot vecror
base address.
> 
> just confirm, do you know CPU will read RCW data before it jump to
0xFFFF_FFFC?

Yes. CPU reset module must fetch RCW and configure CPU itself.
then reset to 0xFFFF_FFFC, it is also same as PQ3.

Thanks,
 Dave