From mboxrd@z Thu Jan 1 00:00:00 1970 From: Avi Kivity Subject: Re: [PATCH] Enabling IA32_TSC_ADJUST for guest VM Date: Tue, 09 Oct 2012 16:30:28 +0200 Message-ID: <50743504.8010207@redhat.com> References: <96EC5A4F3149B74492D2D9B9B1602C2728B61A0D@ORSMSX108.amr.corp.intel.com> <20121008173055.GC12735@amt.cnet> <507414A2.2090706@redhat.com> <20121009142408.GA10848@amt.cnet> <50743418.6050105@redhat.com> <20121009142752.GB10848@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: "Auld, Will" , "kvm@vger.kernel.org" , "Zhang, Xiantao" To: Marcelo Tosatti Return-path: Received: from mx1.redhat.com ([209.132.183.28]:49526 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753552Ab2JIOab (ORCPT ); Tue, 9 Oct 2012 10:30:31 -0400 In-Reply-To: <20121009142752.GB10848@amt.cnet> Sender: kvm-owner@vger.kernel.org List-ID: On 10/09/2012 04:27 PM, Marcelo Tosatti wrote: > On Tue, Oct 09, 2012 at 04:26:32PM +0200, Avi Kivity wrote: >> On 10/09/2012 04:24 PM, Marcelo Tosatti wrote: >> > On Tue, Oct 09, 2012 at 02:12:18PM +0200, Avi Kivity wrote: >> >> On 10/08/2012 07:30 PM, Marcelo Tosatti wrote: >> >> >=20 >> >> > From Intel's manual: >> >> >=20 >> >> > =E2=80=A2 If an execution of WRMSR to the IA32_TIME_STAMP_COUNT= ER MSR adds (or >> >> > subtracts) value X from the TSC, >> >> > the logical processor also adds (or subtracts) value X from the >> >> > IA32_TSC_ADJUST MSR. >> >> >=20 >> >> > This is not handled in the patch.=20 >> >> >=20 >> >> > To support migration, it will be necessary to differentiate bet= ween >> >> > guest initiated and userspace-model initiated msr write. That i= s,=20 >> >> > only guest initiated TSC writes should affect the value of=20 >> >> > IA32_TSC_ADJUST MSR. >> >> >=20 >> >> > Avi, any better idea? >> >> >=20 >> >>=20 >> >> I think we need that anyway, since there are some read-only MSRs = that >> >> need to be configured by the host (nvmx capabilities). So if we = add >> >> that feature it will be useful elsewhere. I don't think it's pos= sible >> >> to do it in any other way: >> >>=20 >> >> "Local offset value of the IA32_TSC for a >> >> logical processor. Reset value is Zero. A >> >> write to IA32_TSC will modify the local >> >> offset in IA32_TSC_ADJUST and the >> >> content of IA32_TSC, but does not affect >> >> the internal invariant TSC hardware." >> >>=20 >> >> What we want to do is affect the internal invariant TSC hardware,= so we >> >> can't do that through the normal means. >> >>=20 >> >> btw, will tsc writes from userspace (after live migration) cause = tsc >> >> skew? If so we should think how to model a guest-wide tsc. >> >=20 >> > No because there is an easy shortcut: >> >=20 >> > if (level =3D=3D KVM_PUT_FULL_STATE) { >> > /* >> > * KVM is yet unable to synchronize TSC values of multiple= VCPUs >> > * on >> > * writeback. Until this is fixed, we only write the offse= t to >> > * SMP >> > * guests after migration, desynchronizing the VCPUs, but >> > * avoiding >> > * huge jump-backs that would occur without any writeback = at >> > * all. >> > */ >> > if (smp_cpus =3D=3D 1 || env->tsc !=3D 0) { >> > kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc); >> > } >> > } >>=20 >> Still we write back after migration. So this needs to be fixed (or = I >> misunderstood you). >=20 > Handled by kvm_write_tsc() in x86.c. Is this what you mean? >=20 It will generate a call to ->write_tsc_offset(). Will the values be th= e same for all vcpus? Note the inputs won't be the same. --=20 error compiling committee.c: too many arguments to function