From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kenneth Graunke Subject: Re: [PATCH] render/gen7: Don't use a message register to store vl Date: Thu, 14 Feb 2013 08:52:16 -0800 Message-ID: <511D1640.8060208@whitecape.org> References: <1360851619-2664-1-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from hapkido.dreamhost.com (hapkido.dreamhost.com [66.33.216.122]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F047E6A2F for ; Thu, 14 Feb 2013 08:51:35 -0800 (PST) Received: from homiemail-a37.g.dreamhost.com (caiajhbdcahe.dreamhost.com [208.97.132.74]) by hapkido.dreamhost.com (Postfix) with ESMTP id 2159018678 for ; Thu, 14 Feb 2013 08:51:35 -0800 (PST) In-Reply-To: <1360851619-2664-1-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Damien Lespiau Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 02/14/2013 06:20 AM, Damien Lespiau wrote: > Turns out the "new" assembler that uses mesa's opcode emission hits the > path that automatically transforms MRF registers into GRF ones in the > exa_wm_src_projective shader. > > The diff with the new assembler is: > > $ intel-gen4disasm -g7 - > - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, > + { 0x00600041, 0x2e8077bd, 0x008d03c0, 0x008d0180 }, > mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; > mul(8) g116<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; > > Of course, message registers are no more in gen7, so the shader is > trying to do something shaddy (ahem!). > > Instead of using m4, let's make exa_wm_src_projective use g68 for v (aka > vl) which makes sense since: > > 1/ vh is g69 > 2/ exa_wm_src_affine uses g68 for vl already > > This commit changes the generated assembly, here's the decoded diff: > > $ intel-gen4disasm -g7 - > - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, > + { 0x00600041, 0x288077bd, 0x008d03c0, 0x008d0180 }, > mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; > mul(8) g68<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; > > Cc: Kenneth Graunke > Reported-by: Xiang, Haihao > Signed-off-by: Damien Lespiau If I recall correctly, the only actual changes between the Gen6 and Gen7 render assembly was converting MRFs to GRFs, and I arbitrarily picked something in the 60s rather than 112+. If you want, I think you could actually just delete all the Gen7 custom assembly and let gen7_convert_mrf_to_grf do it for you. But this looks okay to me, if you'd rather continue doing everything explicitly... Reviewed-by: Kenneth Graunke