From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34166) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNowd-0002h6-6F for qemu-devel@nongnu.org; Thu, 04 Apr 2013 14:31:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNowS-0007oP-L5 for qemu-devel@nongnu.org; Thu, 04 Apr 2013 14:31:31 -0400 Received: from indium.canonical.com ([91.189.90.7]:58063) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNowS-0007md-GZ for qemu-devel@nongnu.org; Thu, 04 Apr 2013 14:31:20 -0400 Received: from loganberry.canonical.com ([91.189.90.37]) by indium.canonical.com with esmtp (Exim 4.71 #1 (Debian)) id 1UNowQ-0002Vl-Mx for ; Thu, 04 Apr 2013 18:31:18 +0000 Received: from loganberry.canonical.com (localhost [127.0.0.1]) by loganberry.canonical.com (Postfix) with ESMTP id 953992E8086 for ; Thu, 4 Apr 2013 18:31:14 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Date: Thu, 04 Apr 2013 18:24:42 -0000 From: Jakub Jermar <1128935@bugs.launchpad.net> Sender: bounces@canonical.com References: <20130218102749.9311.80891.malonedeb@gac.canonical.com> Message-Id: <515DC56A.6070108@jermar.eu> Errors-To: bounces@canonical.com Subject: [Qemu-devel] [Bug 1128935] Re: qemu IA64 emulation Reply-To: Bug 1128935 <1128935@bugs.launchpad.net> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 04/04/2013 07:34 PM, Gigi D'Agostino wrote: > in the past year gsoc qemu proposed projects there where on eproject that= i > liked, which were: qemu IA64 emulation : > http://wiki.qemu.org/Google_Summer_of_Code_2012#IA64_emulation > = > this year i have not seen this project to be proposed, so i would like to > know if the qemu will be selected i would like to know if i will be able = to > begin to make this project. > i am also a very novice in the asm programming (so very noobish in the > field, so u will have to answer a lot of noobish questions :) ), so would= u > accept such a student to make this project? I can't speak for QEMU as I am from the HelenOS mentoring organization, but according to how GSoC works, a student is free to suggest any project. The organizations will then pick the best student applications for things they like and can provide mentors for. HTH, Jakub -- = You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1128935 Title: MIPS r4k "TLB modified exception" generated for TLB entries that are not visible to the TLBP instruction Status in Home for various HelenOS development branches: New Status in QEMU: New Bug description: I occasionally see that the TLBP instruction fails to find the corresponding TLB entry in the TLB Modified exception handler. This behavior is unexpected, because the invocation of the TLB Modified exception suggests there indeed is such an entry in the TLB and only requires its dirty bit to be set. The operating system which can trigger and is susceptible to this behavior is a HelenOS branch located in lp:~jakub/helenos/mips-malta. The QEMU version on which this is reproducible is QEMU 1.4.0 and also some others. When I looked into the QEMU sources, I noticed the following discrepancy, which could potentially explain the behavior: 65 /* MIPS32/MIPS64 R4000-style MMU emulation */ 66 int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot, 67 target_ulong address, int rw, int access_type) 68 { 72 for (i =3D 0; i < env->tlb->tlb_in_use; i++) { 1865 void r4k_helper_tlbp(CPUMIPSState *env) 1866 { 1875 for (i =3D 0; i < env->tlb->nb_tlb; i++) { From the above it appears as if the the code which searches the TLB for a matching entry searched also the QEMU-specific "shadow" TLB entries, which is, however, not in line with how the TLBP instruction searches the TLB. So if a matching entry is found on index >=3D tlb_in_use, the HelenOS exception handler using TLBP to locate the entry would hit an assertion on seeing the Index register bit P set. I also suspect there is a similar issue with the TLB Invalid exception, but thanks to the specifics of the MIPS 4Kc CPU, HelenOS is not susceptible in this case. To manage notifications about this bug go to: https://bugs.launchpad.net/helenos/+bug/1128935/+subscriptions