Re: [Lsf-pc] [LSF/MM TOPIC] Hardware initiated paging of user process pages, hardware access to the CPU page tables of user processes

From: Rik van Riel <riel@redhat.com>
To: Simon Jeons <simon.jeons@gmail.com>
Cc: Jerome Glisse <j.glisse@gmail.com>,
	Andrea Arcangeli <aarcange@redhat.com>,
	Haggai Eran <haggaie@mellanox.com>,
	lsf-pc@lists.linux-foundation.org,
	Liran Liss <liranl@mellanox.com>,
	Shachar Raindel <raindel@mellanox.com>,
	Sagi Grimberg <sagig@mellanox.com>,
	Roland Dreier <roland@purestorage.com>,
	linux-mm@kvack.org, Or Gerlitz <ogerlitz@mellanox.com>,
	Michel Lespinasse <walken@google.com>
Subject: Re: [Lsf-pc] [LSF/MM TOPIC] Hardware initiated paging of user process pages, hardware access to the CPU page tables of user processes
Date: Thu, 11 Apr 2013 22:11:55 -0400	[thread overview]
Message-ID: <51676D6B.1020202@redhat.com> (raw)
In-Reply-To: <51676941.3050802@gmail.com>

On 04/11/2013 09:54 PM, Simon Jeons wrote:
> Hi Jerome,
> On 04/12/2013 02:38 AM, Jerome Glisse wrote:
>> On Thu, Apr 11, 2013 at 11:42:05AM +0800, Simon Jeons wrote:

>> Tomorrow world we want gpu to be able to access memory that the
>> application
>> allocated through a simple malloc and we want the kernel to be able to
>> recycly any page at any time because of memory pressure or because kernel
>> decide to do so.
>>
>> That's just what we want to do. To achieve so we are getting hw that
>> can do
>> pagefault. No change to kernel core mm code (some improvement might be
>> made).
>
> The memory disappear since you have a reference(gup) against it,
> correct? Tomorrow world you want the page fault trigger through iommu
> driver that call get_user_pages, it also will take a reference(since gup
> is called), isn't it? Anyway, assume tomorrow world doesn't take a
> reference, we don't need care page which used by GPU is reclaimed?

The GPU and CPU may each have a different page table format.
The kernel will need to keep both in sync. That is one of the
things this discussion is about.

For performance reasons, it may also make sense to locate some
of the application's data in the GPU's own memory, so it does
not have to cross the PCIE bus every time it needs to load the
data. That requires memory coherency code in the kernel.

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