From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753658Ab2JWKTg (ORCPT ); Tue, 23 Oct 2012 06:19:36 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:60187 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751637Ab2JWKTd convert rfc822-to-8bit (ORCPT ); Tue, 23 Oct 2012 06:19:33 -0400 From: "Philip, Avinash" To: Peter Korsgaard CC: "dwmw2@infradead.org" , "artem.bityutskiy@linux.intel.com" , "tony@atomide.com" , "Mohammed, Afzal" , "linux-doc@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" , "ivan.djelic@parrot.com" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Thread-Topic: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Thread-Index: AQHNqwbqdlAuQrnYe0yMlvLTrfYpApfGss1w Date: Tue, 23 Oct 2012 10:18:02 +0000 Deferred-Delivery: Tue, 23 Oct 2012 10:17:00 +0000 Message-ID: <518397C60809E147AF5323E0420B992E3E9D29C8@DBDE01.ent.ti.com> References: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> <1349274589-11389-4-git-send-email-avinashphilip@ti.com> <87vcebvaf5.fsf@macbook.be.48ers.dk> In-Reply-To: <87vcebvaf5.fsf@macbook.be.48ers.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.24.162.25] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 16, 2012 at 00:18:30, Peter Korsgaard wrote: > >>>>> Philip, Avinash writes: > > > Add support for BCH ECC scheme to gpmc driver and also enabling multi > > sector read/write. This helps in doing single shot NAND page read and > > write. > > > ECC engine configurations > > BCH 4 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 13 and ecc_size1 as 1. > > > BCH 8 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 26 and ecc_size1 as 2. > > > Note: For BCH8 ECC bytes set to 14 to make compatible with RBL. > > On what device? In the am335x TRM (spruh73f.pdf) figure 26-15 (pg 4273) > the rom code is documented to not use any padding on the ECC bytes > (E.G. oob 2..53): > > http://www.ti.com/litv/pdf/spruh73f > > I see the driver in the u-boot-am33x tree (ti81xx_nand.c) seems to use > 4x14 bytes as well though, so perhaps that's a bug in the documentation > instead? Yes, RBL uses 4x14 bytes. Thanks Avinash > > -- > Bye, Peter Korsgaard > From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Philip, Avinash" Subject: RE: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Date: Tue, 23 Oct 2012 10:18:02 +0000 Message-ID: <518397C60809E147AF5323E0420B992E3E9D29C8@DBDE01.ent.ti.com> References: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> <1349274589-11389-4-git-send-email-avinashphilip@ti.com> <87vcebvaf5.fsf@macbook.be.48ers.dk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: <87vcebvaf5.fsf@macbook.be.48ers.dk> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Peter Korsgaard Cc: "dwmw2@infradead.org" , "artem.bityutskiy@linux.intel.com" , "tony@atomide.com" , "Mohammed, Afzal" , "linux-doc@vger.kernel.org" , "devicetree-discuss@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" , "ivan.djelic@parrot.com" , "linux-omap@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" List-Id: devicetree@vger.kernel.org On Tue, Oct 16, 2012 at 00:18:30, Peter Korsgaard wrote: > >>>>> Philip, Avinash writes: > > > Add support for BCH ECC scheme to gpmc driver and also enabling multi > > sector read/write. This helps in doing single shot NAND page read and > > write. > > > ECC engine configurations > > BCH 4 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 13 and ecc_size1 as 1. > > > BCH 8 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 26 and ecc_size1 as 2. > > > Note: For BCH8 ECC bytes set to 14 to make compatible with RBL. > > On what device? In the am335x TRM (spruh73f.pdf) figure 26-15 (pg 4273) > the rom code is documented to not use any padding on the ECC bytes > (E.G. oob 2..53): > > http://www.ti.com/litv/pdf/spruh73f > > I see the driver in the u-boot-am33x tree (ti81xx_nand.c) seems to use > 4x14 bytes as well though, so perhaps that's a bug in the documentation > instead? Yes, RBL uses 4x14 bytes. Thanks Avinash > > -- > Bye, Peter Korsgaard > From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Philip, Avinash" To: Peter Korsgaard Subject: RE: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme Date: Tue, 23 Oct 2012 10:18:02 +0000 Message-ID: <518397C60809E147AF5323E0420B992E3E9D29C8@DBDE01.ent.ti.com> References: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> <1349274589-11389-4-git-send-email-avinashphilip@ti.com> <87vcebvaf5.fsf@macbook.be.48ers.dk> In-Reply-To: <87vcebvaf5.fsf@macbook.be.48ers.dk> Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "Mohammed, Afzal" , "linux-doc@vger.kernel.org" , "tony@atomide.com" , "artem.bityutskiy@linux.intel.com" , "devicetree-discuss@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" , "ivan.djelic@parrot.com" , "linux-omap@vger.kernel.org" , "dwmw2@infradead.org" , "linux-arm-kernel@lists.infradead.org" List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, Oct 16, 2012 at 00:18:30, Peter Korsgaard wrote: > >>>>> Philip, Avinash writes: >=20 > > Add support for BCH ECC scheme to gpmc driver and also enabling multi > > sector read/write. This helps in doing single shot NAND page read and > > write. >=20 > > ECC engine configurations > > BCH 4 bit support > > 1. write =3D> ECC engine configured in wrap mode 6 and with ecc_size0 = as 32. > > 2. read =3D> ECC engine configured in wrap mode 1 and with ecc_size0 = as > > 13 and ecc_size1 as 1. >=20 > > BCH 8 bit support > > 1. write =3D> ECC engine configured in wrap mode 6 and with ecc_size0 = as 32. > > 2. read =3D> ECC engine configured in wrap mode 1 and with ecc_size0 = as > > 26 and ecc_size1 as 2. >=20 > > Note: For BCH8 ECC bytes set to 14 to make compatible with RBL. >=20 > On what device? In the am335x TRM (spruh73f.pdf) figure 26-15 (pg 4273) > the rom code is documented to not use any padding on the ECC bytes > (E.G. oob 2..53): >=20 > http://www.ti.com/litv/pdf/spruh73f >=20 > I see the driver in the u-boot-am33x tree (ti81xx_nand.c) seems to use > 4x14 bytes as well though, so perhaps that's a bug in the documentation > instead? Yes, RBL uses 4x14 bytes. Thanks Avinash >=20 > --=20 > Bye, Peter Korsgaard >=20 From mboxrd@z Thu Jan 1 00:00:00 1970 From: avinashphilip@ti.com (Philip, Avinash) Date: Tue, 23 Oct 2012 10:18:02 +0000 Subject: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme In-Reply-To: <87vcebvaf5.fsf@macbook.be.48ers.dk> References: <1349274589-11389-1-git-send-email-avinashphilip@ti.com> <1349274589-11389-4-git-send-email-avinashphilip@ti.com> <87vcebvaf5.fsf@macbook.be.48ers.dk> Message-ID: <518397C60809E147AF5323E0420B992E3E9D29C8@DBDE01.ent.ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Oct 16, 2012 at 00:18:30, Peter Korsgaard wrote: > >>>>> Philip, Avinash writes: > > > Add support for BCH ECC scheme to gpmc driver and also enabling multi > > sector read/write. This helps in doing single shot NAND page read and > > write. > > > ECC engine configurations > > BCH 4 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 13 and ecc_size1 as 1. > > > BCH 8 bit support > > 1. write => ECC engine configured in wrap mode 6 and with ecc_size0 as 32. > > 2. read => ECC engine configured in wrap mode 1 and with ecc_size0 as > > 26 and ecc_size1 as 2. > > > Note: For BCH8 ECC bytes set to 14 to make compatible with RBL. > > On what device? In the am335x TRM (spruh73f.pdf) figure 26-15 (pg 4273) > the rom code is documented to not use any padding on the ECC bytes > (E.G. oob 2..53): > > http://www.ti.com/litv/pdf/spruh73f > > I see the driver in the u-boot-am33x tree (ti81xx_nand.c) seems to use > 4x14 bytes as well though, so perhaps that's a bug in the documentation > instead? Yes, RBL uses 4x14 bytes. Thanks Avinash > > -- > Bye, Peter Korsgaard >