Re: mtd_oobtest fails with GPMI-NAND

[Stefan Roese <sr@denx.de>]

On 05/13/2013 11:01 AM, Huang Shijie wrote:
>> Please correct me if I'm wrong, but from my understanding the Linux GPMI
>> NAND driver configures the timings. So this is not board platform code
>> related but NAND driver related.
>>
>> Do you have any hints where to "tune/change" some values (timing or
>> signal related) to fix this error?
>>
> Please check the schematic, is there some pin conflict with the gpmi-nand?
> What's the pad value for these pins? You can take a reference with 
> current dts file.

We're currently using the same values as in imx6q-sabresd.dts. With this
addition:

+	soc {
+		nfc: gpmi-nand@00112000 {
+			status = "enabled";
+		};
+	};

to enable NAND support. So the pin muxing from imx6q.dtsi (gpmi-nand-1)
is used (which is what is also connected physically). Again, I don't
think that pin-muxing is our problem here.

>>> The key issue (i want to emphosis ) is that the current gpmi-nand does
>>> not support the
>>> subpage operations.
>> Yes. And this is disabled via setting NAND_NO_SUBPAGE_WRITE in the
>> options variable in the GPMI NAND driver.
>>
>> BTW: I just tested with the "mtd_nandbiterrs" test. This fails directly.
>> I would have expected the ECC to being able to at least correct the
>> errors for some loops:
>>
>> # insmod mtd_nandbiterrs.ko dev=3 mode=0

<snip>

>> Huang, is this to be expected? How does this look on one of your
>> officially "supported" imx6 boards with NAND support?
>>
> I suggest you do not use the mtd_nandbiterrs.ko. It will call the 
> mtd_write_oob() which will definitely lead to the
> -EBADMSG (-74) error.
> 
> The mtd_write_oob() in mtd_nandbiterrs.ko writes a whole page without 
> enabling the BCH to do the hardware ECC.
> But mtd_read() in mtd_nandbiterrs.ko DOES do the hardware ECC by the BCH.
> It's normal that you meet -74.

Okay. Thanks for the explanation.

> You can use the mtd_torturetest, such as:
> 
> #insmod mtd_torturetest.ko dev=3 check=1 cycles_count=1 eb=0 ebcnt=4 gran=1

Done. But no errors in this test though. Even with increasing the
cycles_count. I don't want to destroy this chip, so I'm not increasing
the cycles too much.

Which NAND devices did you test with on imx6? Did you also tests with a
"similar" Micron ONFI chip as this one (MT29F4G08ABADAH4)?

>> SLC. Why do you ask?
> For the MLC, if you write the OOB, it will impacts other part of the 
> page. For some nands, you will meet a -74.
> that's another story.

Thanks,
Stefan