From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH v3 08/13] nEPT: Some additional comments Date: Mon, 20 May 2013 15:21:52 +0200 Message-ID: <519A2370.7080605@redhat.com> References: <1368939152-11406-1-git-send-email-jun.nakajima@intel.com> <1368939152-11406-8-git-send-email-jun.nakajima@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, Gleb Natapov To: Jun Nakajima Return-path: Received: from mail-gg0-f179.google.com ([209.85.161.179]:46302 "EHLO mail-gg0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756145Ab3ETNWC (ORCPT ); Mon, 20 May 2013 09:22:02 -0400 Received: by mail-gg0-f179.google.com with SMTP id c4so909917ggn.24 for ; Mon, 20 May 2013 06:22:01 -0700 (PDT) In-Reply-To: <1368939152-11406-8-git-send-email-jun.nakajima@intel.com> Sender: kvm-owner@vger.kernel.org List-ID: Il 19/05/2013 06:52, Jun Nakajima ha scritto: > From: Nadav Har'El > > Some additional comments to preexisting code: > Explain who (L0 or L1) handles EPT violation and misconfiguration exits. > Don't mention "shadow on either EPT or shadow" as the only two options. > > Signed-off-by: Nadav Har'El > Signed-off-by: Jun Nakajima > Signed-off-by: Xinhao Xu > --- > arch/x86/kvm/vmx.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index b79efd4..4661a22 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -6540,7 +6540,20 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu) > return nested_cpu_has2(vmcs12, > SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES); > case EXIT_REASON_EPT_VIOLATION: > + /* > + * L0 always deals with the EPT violation. If nested EPT is > + * used, and the nested mmu code discovers that the address is > + * missing in the guest EPT table (EPT12), the EPT violation > + * will be injected with nested_ept_inject_page_fault() > + */ > + return 0; > case EXIT_REASON_EPT_MISCONFIG: > + /* > + * L2 never uses directly L1's EPT, but rather L0's own EPT > + * table (shadow on EPT) or a merged EPT table that L0 built > + * (EPT on EPT). So any problems with the structure of the > + * table is L0's fault. > + */ > return 0; > case EXIT_REASON_PREEMPTION_TIMER: > return vmcs12->pin_based_vm_exec_control & > Reviewed-by: Paolo Bonzini