From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C02AEC433F5 for ; Wed, 19 Jan 2022 06:44:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346419AbiASGoZ (ORCPT ); Wed, 19 Jan 2022 01:44:25 -0500 Received: from foss.arm.com ([217.140.110.172]:48178 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236370AbiASGoY (ORCPT ); Wed, 19 Jan 2022 01:44:24 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE590D6E; Tue, 18 Jan 2022 22:44:23 -0800 (PST) Received: from [10.163.74.69] (unknown [10.163.74.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 859653F73D; Tue, 18 Jan 2022 22:44:20 -0800 (PST) Subject: Re: [PATCH 1/2] arm64: Add Cortex-X2 CPU part definition To: Arnd Bergmann Cc: Linux ARM , Catalin Marinas , Will Deacon , Mathieu Poirier , Suzuki Poulose , coresight@lists.linaro.org, Linux Kernel Mailing List References: <1641980099-20315-1-git-send-email-anshuman.khandual@arm.com> <1641980099-20315-2-git-send-email-anshuman.khandual@arm.com> <00e28671-8d3a-f789-91c4-109814792a07@arm.com> From: Anshuman Khandual Message-ID: <519f3b4e-e790-c051-3cb1-3fd229a3e498@arm.com> Date: Wed, 19 Jan 2022 12:14:23 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/13/22 5:17 PM, Arnd Bergmann wrote: > On Thu, Jan 13, 2022 at 4:03 AM Anshuman Khandual > wrote: >> On 1/12/22 4:20 PM, Arnd Bergmann wrote: >>> On Wed, Jan 12, 2022 at 10:34 AM Anshuman Khandual wrote: >>>> Add the CPU Partnumbers for the new Arm designs. >>>> @@ -74,6 +74,7 @@ >>>> #define ARM_CPU_PART_NEOVERSE_N1 0xD0C >>>> #define ARM_CPU_PART_CORTEX_A77 0xD0D >>>> #define ARM_CPU_PART_CORTEX_A710 0xD47 >>>> +#define ARM_CPU_PART_CORTEX_X2 0xD48 >>>> #define ARM_CPU_PART_NEOVERSE_N2 0xD49 >>> >>> No objections to the patch, but would it be possible to just add all the missing >>> ones here to the degree that they are known already? I don't see any entries for >>> Cortex-A34, Cortex-A65AE, Cortex-A78, Cortex-A78C, Cortex-A78AE, >>> Neoverse-E1, Neoverse-V1, Cortex-X1, Cortex-X2, Cortex-A510, Cortex-A710 >>> and Cortex-R82 among the Arm-designed cores that can run Linux, and there >>> are probably others that I missed going through the list. >> >> Hi Arnd, >> >> IIUC the part numbers are enumerated here only if there is an errata >> applicable for them which needs to be detected at boot. I am not sure >> whether all cpu versions that can run Linux, needs to be defined here. >> But then I might be missing something. > > They clearly don't need to be defined here, and for other constants such > as the system registers we may not want to list them all, but I think for > the CPU IDs it makes sense to just list them all here rather than adding > them one at a time, as we tend to need them sooner or later anyway. > > It also helps me personally to have a known place to look up the names > by value rather than chasing through reference manuals. IIUC the purpose here would be a quick CPU ID documentation reference check ? I will wait for other opinions here and add the remaining in a separate patch probably. > > Arnd > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC81DC433EF for ; Wed, 19 Jan 2022 06:45:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=JfwD3DnorVzD7utgSxIFE5sHgdoGkW3QjpjHSAtANSE=; b=X3Rx7kWuylYY3iLrVbD3UJM++A 3S2pTBSB8R3qfZ99sJggtgwfLQOrA5NvksbjCOmslGZByftTY+44BxF1sv+qCumZ3zTmQ+0ts7T5a WbYwGFK5jt9fGnesk8yFFfe+T3zJEuMX1L0ABj5a0urF3S44UP7hZhowxSljJ2v8ppHDnndt6lWdO yXsOJYW2xul94STPTiyK++OowvOQnSCT8vzG5GCdJ8T+lfb/QDi0P8wkw9i5WALqr4woZKwxWbS8o rmj/AkCsIStN9wUt0klHrXFZw+SgC528Rsiwiu09ZLp8AtmqzRgDfBRKYKNswEhW4e0YIUviQiiQF fR4SUEGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nA4ho-0040YG-PU; Wed, 19 Jan 2022 06:44:28 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nA4hl-0040X3-AM for linux-arm-kernel@lists.infradead.org; Wed, 19 Jan 2022 06:44:26 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE590D6E; Tue, 18 Jan 2022 22:44:23 -0800 (PST) Received: from [10.163.74.69] (unknown [10.163.74.69]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 859653F73D; Tue, 18 Jan 2022 22:44:20 -0800 (PST) Subject: Re: [PATCH 1/2] arm64: Add Cortex-X2 CPU part definition To: Arnd Bergmann Cc: Linux ARM , Catalin Marinas , Will Deacon , Mathieu Poirier , Suzuki Poulose , coresight@lists.linaro.org, Linux Kernel Mailing List References: <1641980099-20315-1-git-send-email-anshuman.khandual@arm.com> <1641980099-20315-2-git-send-email-anshuman.khandual@arm.com> <00e28671-8d3a-f789-91c4-109814792a07@arm.com> From: Anshuman Khandual Message-ID: <519f3b4e-e790-c051-3cb1-3fd229a3e498@arm.com> Date: Wed, 19 Jan 2022 12:14:23 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220118_224425_448299_FB42A404 X-CRM114-Status: GOOD ( 25.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/13/22 5:17 PM, Arnd Bergmann wrote: > On Thu, Jan 13, 2022 at 4:03 AM Anshuman Khandual > wrote: >> On 1/12/22 4:20 PM, Arnd Bergmann wrote: >>> On Wed, Jan 12, 2022 at 10:34 AM Anshuman Khandual wrote: >>>> Add the CPU Partnumbers for the new Arm designs. >>>> @@ -74,6 +74,7 @@ >>>> #define ARM_CPU_PART_NEOVERSE_N1 0xD0C >>>> #define ARM_CPU_PART_CORTEX_A77 0xD0D >>>> #define ARM_CPU_PART_CORTEX_A710 0xD47 >>>> +#define ARM_CPU_PART_CORTEX_X2 0xD48 >>>> #define ARM_CPU_PART_NEOVERSE_N2 0xD49 >>> >>> No objections to the patch, but would it be possible to just add all the missing >>> ones here to the degree that they are known already? I don't see any entries for >>> Cortex-A34, Cortex-A65AE, Cortex-A78, Cortex-A78C, Cortex-A78AE, >>> Neoverse-E1, Neoverse-V1, Cortex-X1, Cortex-X2, Cortex-A510, Cortex-A710 >>> and Cortex-R82 among the Arm-designed cores that can run Linux, and there >>> are probably others that I missed going through the list. >> >> Hi Arnd, >> >> IIUC the part numbers are enumerated here only if there is an errata >> applicable for them which needs to be detected at boot. I am not sure >> whether all cpu versions that can run Linux, needs to be defined here. >> But then I might be missing something. > > They clearly don't need to be defined here, and for other constants such > as the system registers we may not want to list them all, but I think for > the CPU IDs it makes sense to just list them all here rather than adding > them one at a time, as we tend to need them sooner or later anyway. > > It also helps me personally to have a known place to look up the names > by value rather than chasing through reference manuals. IIUC the purpose here would be a quick CPU ID documentation reference check ? I will wait for other opinions here and add the remaining in a separate patch probably. > > Arnd > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel