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Date: Fri, 12 Jul 2013 15:27:01 -0700
From: "H. Peter Anvin" <hpa@zytor.com>
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To: Kees Cook <keescook@chromium.org>
CC: linux-kernel@vger.kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, x86@kernel.org,
        Borislav Petkov <bp@suse.de>, Fenghua Yu <fenghua.yu@intel.com>,
        Yinghai Lu <yinghai@kernel.org>, Seiji Aguchi <seiji.aguchi@hds.com>,
        PaX Team <pageexec@freemail.hu>
Subject: Re: [PATCH] x86: make sure IDT is page aligned
References: <20130712183014.GA20551@www.outflux.net>
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On 07/12/2013 11:30 AM, Kees Cook wrote:
> Since the IDT is referenced from a fixmap, make sure it is page aligned.
> This avoids the risk of it ever being moved in the bss and having the
> fixmap fail.
> 
> Signed-off-by: Kees Cook <keescook@chromium.org>
> Reported-by: PaX Team <pageexec@freemail.hu>
> Cc: stable@vger.kernel.org
> ---
>  arch/x86/kernel/head_32.S |    2 +-
>  arch/x86/kernel/head_64.S |    2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
> index e65ddc6..3526dd1 100644
> --- a/arch/x86/kernel/head_32.S
> +++ b/arch/x86/kernel/head_32.S
> @@ -734,7 +734,7 @@ boot_gdt_descr:
>  	.word __BOOT_DS+7
>  	.long boot_gdt - __PAGE_OFFSET
>  
> -	.word 0				# 32-bit align idt_desc.address
> +	.word PAGE_SIZE			# page align idt_desc.address
>  idt_descr:
>  	.word IDT_ENTRIES*8-1		# idt contains 256 entries
>  	.long idt_table
> diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
> index 5e4d8a8..77e6d3e 100644
> --- a/arch/x86/kernel/head_64.S
> +++ b/arch/x86/kernel/head_64.S
> @@ -513,7 +513,7 @@ ENTRY(phys_base)
>  #include "../../x86/xen/xen-head.S"
>  	
>  	.section .bss, "aw", @nobits
> -	.align L1_CACHE_BYTES
> +	.align PAGE_SIZE
>  ENTRY(idt_table)
>  	.skip IDT_ENTRIES * 16
>  
> 

You are aligning the IDT *descriptor*, not the IDT itself?

	-hpa