From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rajendra Nayak Subject: Re: [PATCHv4 03/33] CLK: OMAP4: Add DPLL clock support Date: Thu, 1 Aug 2013 13:59:49 +0530 Message-ID: <51FA1C7D.5060403@ti.com> References: <1374564028-11352-1-git-send-email-t-kristo@ti.com> <1374564028-11352-4-git-send-email-t-kristo@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1374564028-11352-4-git-send-email-t-kristo@ti.com> Sender: linux-omap-owner@vger.kernel.org To: Tero Kristo Cc: linux-omap@vger.kernel.org, paul@pwsan.com, khilman@linaro.org, tony@atomide.com, mturquette@linaro.org, nm@ti.com, linux-arm-kernel@lists.infradead.org, devicetree-discuss@lists.ozlabs.org List-Id: devicetree@vger.kernel.org Tero, On Tuesday 23 July 2013 12:49 PM, Tero Kristo wrote: > + dd->control_reg = of_iomap(node, 0); > + dd->idlest_reg = of_iomap(node, 1); > + dd->autoidle_reg = of_iomap(node, 2); > + dd->mult_div1_reg = of_iomap(node, 3); > + []... > + reg = of_iomap(node, 0); Doing an of_iomap() for every single clock register seems like an overkill and might have performance penalties at boot. regards, Rajendra From mboxrd@z Thu Jan 1 00:00:00 1970 From: rnayak@ti.com (Rajendra Nayak) Date: Thu, 1 Aug 2013 13:59:49 +0530 Subject: [PATCHv4 03/33] CLK: OMAP4: Add DPLL clock support In-Reply-To: <1374564028-11352-4-git-send-email-t-kristo@ti.com> References: <1374564028-11352-1-git-send-email-t-kristo@ti.com> <1374564028-11352-4-git-send-email-t-kristo@ti.com> Message-ID: <51FA1C7D.5060403@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Tero, On Tuesday 23 July 2013 12:49 PM, Tero Kristo wrote: > + dd->control_reg = of_iomap(node, 0); > + dd->idlest_reg = of_iomap(node, 1); > + dd->autoidle_reg = of_iomap(node, 2); > + dd->mult_div1_reg = of_iomap(node, 3); > + []... > + reg = of_iomap(node, 0); Doing an of_iomap() for every single clock register seems like an overkill and might have performance penalties at boot. regards, Rajendra