From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36259) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VvQFg-0004dO-KU for qemu-devel@nongnu.org; Tue, 24 Dec 2013 06:34:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VvQFb-00042i-P3 for qemu-devel@nongnu.org; Tue, 24 Dec 2013 06:34:20 -0500 Received: from cantor2.suse.de ([195.135.220.15]:51055 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VvQFb-00042Z-Fx for qemu-devel@nongnu.org; Tue, 24 Dec 2013 06:34:15 -0500 Message-ID: <52B97134.3090700@suse.de> Date: Tue, 24 Dec 2013 12:34:12 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1387852706-18926-1-git-send-email-afaerber@suse.de> <1387853579.8547.6.camel@G08FNSTD131468> In-Reply-To: <1387853579.8547.6.camel@G08FNSTD131468> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH qom-cpu] cpu-exec: Optimize X86CPU usage in cpu_exec() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Chen Fan Cc: qemu-devel@nongnu.org Am 24.12.2013 03:52, schrieb Chen Fan: > On Tue, 2013-12-24 at 03:38 +0100, Andreas F=C3=A4rber wrote: >> Replace growing numbers of inline x86_env_get_cpu() with x86_cpu varia= ble. >> >> Signed-off-by: Andreas F=C3=A4rber >> --- >> cpu-exec.c | 14 ++++++++++---- >> 1 file changed, 10 insertions(+), 4 deletions(-) >> >> diff --git a/cpu-exec.c b/cpu-exec.c >> index 2711c58..f7a215c 100644 >> --- a/cpu-exec.c >> +++ b/cpu-exec.c >> @@ -206,6 +206,9 @@ int cpu_exec(CPUArchState *env) >> (defined(TARGET_M68K) || defined(TARGET_PPC) || defined(TARGET_= S390X))) >> CPUClass *cc =3D CPU_GET_CLASS(cpu); >> #endif >> +#ifdef TARGET_I386 >> + X86CPU *x86_cpu =3D X86_CPU(cpu); >> +#endif > Hi, Andreas, > I think this defined grammar should correspond with other, of course > it's correct also. Yes, X86_CPU(cpu) =3D=3D CPU(x86_cpu), so converting at CPU level seemed more straightforward to me rather than going outwards from embedded env, given that the number of casts is kept low (once at beginning). >> int ret, interrupt_request; >> TranslationBlock *tb; >> uint8_t *tc_ptr; >> @@ -320,24 +323,24 @@ int cpu_exec(CPUArchState *env) >> #if !defined(CONFIG_USER_ONLY) >> if (interrupt_request & CPU_INTERRUPT_POLL) { >> cpu->interrupt_request &=3D ~CPU_INTERRUPT_PO= LL; >> - apic_poll_irq(x86_env_get_cpu(env)->apic_stat= e); >> + apic_poll_irq(x86_cpu->apic_state); >> } >> #endif >> if (interrupt_request & CPU_INTERRUPT_INIT) { >> cpu_svm_check_intercept_param(env, SVM_EX= IT_INIT, >> 0); >> - do_cpu_init(x86_env_get_cpu(env)); >> + do_cpu_init(x86_cpu); >> env->exception_index =3D EXCP_HALTED; >> cpu_loop_exit(env); >> } else if (interrupt_request & CPU_INTERRUPT_SIPI= ) { >> - do_cpu_sipi(x86_env_get_cpu(env)); >> + do_cpu_sipi(x86_cpu); >> } else if (env->hflags2 & HF2_GIF_MASK) { >> if ((interrupt_request & CPU_INTERRUPT_SMI) &= & >> !(env->hflags & HF_SMM_MASK)) { >> cpu_svm_check_intercept_param(env, SVM_EX= IT_SMI, >> 0); >> cpu->interrupt_request &=3D ~CPU_INTERRUP= T_SMI; >> - do_smm_enter(x86_env_get_cpu(env)); >> + do_smm_enter(x86_cpu); >> next_tb =3D 0; >> } else if ((interrupt_request & CPU_INTERRUPT= _NMI) && >> !(env->hflags2 & HF2_NMI_MASK)) { >> @@ -685,6 +688,9 @@ int cpu_exec(CPUArchState *env) >> (defined(TARGET_M68K) || defined(TARGET_PPC) || defined(TARGET_= S390X))) >> cc =3D CPU_GET_CLASS(cpu); >> #endif >> +#ifdef TARGET_I386 >> + x86_cpu =3D X86_CPU(cpu); >> +#endif >> } >> } /* for(;;) */ >> =20 > Reviewed-by: Chen Fan Thanks, applied to qom-cpu: https://github.com/afaerber/qemu-cpu/commits/qom-cpu Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg