From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [RFC PATCH v2] kvm: x86: ignore ioapic polarity Date: Thu, 13 Mar 2014 11:53:04 +0100 Message-ID: <53218E10.60503@redhat.com> References: <20140214220600.GI29329@ERROL.INI.CMU.EDU> <2CEB9F8C-E983-4182-A514-44EC568E18D8@suse.de> <20140216114151.GB30056@redhat.com> <1392562020.15608.437.camel@ul30vt.home> <20140216162300.GI30056@redhat.com> <20140227170549.GA23037@redhat.com> <20140227214102.GG17184@ERROL.INI.CMU.EDU> <530FBC9F.8080800@redhat.com> <20140227231312.GH17184@ERROL.INI.CMU.EDU> <530FCACF.40100@redhat.com> <20140228040617.GA22103@crash.ini.cmu.edu> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: mst@redhat.com, alex.williamson@redhat.com, eddie.dong@intel.com, agraf@suse.de, qemu-devel@nongnu.org To: "Gabriel L. Somlo" , kvm@vger.kernel.org Return-path: Received: from mail-ee0-f42.google.com ([74.125.83.42]:53284 "EHLO mail-ee0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754175AbaCMKxI (ORCPT ); Thu, 13 Mar 2014 06:53:08 -0400 Received: by mail-ee0-f42.google.com with SMTP id d17so334779eek.29 for ; Thu, 13 Mar 2014 03:53:07 -0700 (PDT) In-Reply-To: <20140228040617.GA22103@crash.ini.cmu.edu> Sender: kvm-owner@vger.kernel.org List-ID: Il 28/02/2014 05:06, Gabriel L. Somlo ha scritto: > +NOTE: For each level-triggered interrupt managed by a virtual ioapic, > +the guest OS may set a polarity value (bit 13 of each corresponding I/O > +redirection table register). The polarity bit defines the relationship > +between an irq line's logical state (active/asserted = 1, inactive = 0) > +and its physical state (high = 1, low = 0). When the polarity bit is 0 > +(ActiveHigh), logical and physical states are matched (active == high == 1, > +inactive == low == 0). When polarity is set to 1 (ActiveLow), logical and > +physical state are opposites (logical == !physical). Typically, guests are > +expected to use the same polarity across all level-triggered interrupts, > +as directed by ACPI. Historically, both KVM and QEMU have accumulated a > +significant number of optimizations based on the hard-coded assumption > +that polarity will always be set to ActiveHigh. When interfacing with KVM, > +QEMU will use the ActiveHigh convention for all level-triggered irqs, > +regardless of how the guest OS has configured the polarity bits in the > +ioapic registers. As such, KVM must also ignore these bits, and always act > +as if the logical and physical states of an irq line exactly match each > +other (i.e., follow the ActiveHigh convention regardless of polarity). > + Instead of this, I'm adding the following to the KVM_IRQ_LINE ioctl: +On real hardware, interrupt pins can be active-low or active-high. This +does not matter for the level field of struct kvm_irq_level: 1 always +means active (asserted), 0 means inactive (deasserted). + +x86 allows the operating system to program the interrupt polarity +(active-low/active-high) for level-triggered interrupts, and KVM used +to consider the polarity. However, due to bitrot in the handling of +active-low interrupts, the above convention is now valid on x86 too. +This is signaled by KVM_CAP_X86_IOAPIC_POLARITY_IGNORED. Userspace +should not present interrupts to the guest as active-low unless this +capability is present (or unless it is not using the in-kernel irqchip, +of course). and applying the patch to kvm/queue. Paolo From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51108) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WO3GH-0005qj-FI for qemu-devel@nongnu.org; Thu, 13 Mar 2014 06:53:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WO3G9-0004Vq-2K for qemu-devel@nongnu.org; Thu, 13 Mar 2014 06:53:17 -0400 Received: from mail-ea0-x235.google.com ([2a00:1450:4013:c01::235]:63190) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WO3G8-0004Vm-Qk for qemu-devel@nongnu.org; Thu, 13 Mar 2014 06:53:08 -0400 Received: by mail-ea0-f181.google.com with SMTP id k10so392975eaj.26 for ; Thu, 13 Mar 2014 03:53:07 -0700 (PDT) Sender: Paolo Bonzini Message-ID: <53218E10.60503@redhat.com> Date: Thu, 13 Mar 2014 11:53:04 +0100 From: Paolo Bonzini MIME-Version: 1.0 References: <20140214220600.GI29329@ERROL.INI.CMU.EDU> <2CEB9F8C-E983-4182-A514-44EC568E18D8@suse.de> <20140216114151.GB30056@redhat.com> <1392562020.15608.437.camel@ul30vt.home> <20140216162300.GI30056@redhat.com> <20140227170549.GA23037@redhat.com> <20140227214102.GG17184@ERROL.INI.CMU.EDU> <530FBC9F.8080800@redhat.com> <20140227231312.GH17184@ERROL.INI.CMU.EDU> <530FCACF.40100@redhat.com> <20140228040617.GA22103@crash.ini.cmu.edu> In-Reply-To: <20140228040617.GA22103@crash.ini.cmu.edu> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH v2] kvm: x86: ignore ioapic polarity List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Gabriel L. Somlo" , kvm@vger.kernel.org Cc: qemu-devel@nongnu.org, alex.williamson@redhat.com, eddie.dong@intel.com, agraf@suse.de, mst@redhat.com Il 28/02/2014 05:06, Gabriel L. Somlo ha scritto: > +NOTE: For each level-triggered interrupt managed by a virtual ioapic, > +the guest OS may set a polarity value (bit 13 of each corresponding I/O > +redirection table register). The polarity bit defines the relationship > +between an irq line's logical state (active/asserted = 1, inactive = 0) > +and its physical state (high = 1, low = 0). When the polarity bit is 0 > +(ActiveHigh), logical and physical states are matched (active == high == 1, > +inactive == low == 0). When polarity is set to 1 (ActiveLow), logical and > +physical state are opposites (logical == !physical). Typically, guests are > +expected to use the same polarity across all level-triggered interrupts, > +as directed by ACPI. Historically, both KVM and QEMU have accumulated a > +significant number of optimizations based on the hard-coded assumption > +that polarity will always be set to ActiveHigh. When interfacing with KVM, > +QEMU will use the ActiveHigh convention for all level-triggered irqs, > +regardless of how the guest OS has configured the polarity bits in the > +ioapic registers. As such, KVM must also ignore these bits, and always act > +as if the logical and physical states of an irq line exactly match each > +other (i.e., follow the ActiveHigh convention regardless of polarity). > + Instead of this, I'm adding the following to the KVM_IRQ_LINE ioctl: +On real hardware, interrupt pins can be active-low or active-high. This +does not matter for the level field of struct kvm_irq_level: 1 always +means active (asserted), 0 means inactive (deasserted). + +x86 allows the operating system to program the interrupt polarity +(active-low/active-high) for level-triggered interrupts, and KVM used +to consider the polarity. However, due to bitrot in the handling of +active-low interrupts, the above convention is now valid on x86 too. +This is signaled by KVM_CAP_X86_IOAPIC_POLARITY_IGNORED. Userspace +should not present interrupts to the guest as active-low unless this +capability is present (or unless it is not using the in-kernel irqchip, +of course). and applying the patch to kvm/queue. Paolo