Re: [PATCH 1/4] target/core: T10-Dif: check HW support capabilities

[sagi grimberg <sagig@mellanox.com>]

On 4/1/2014 8:09 PM, Martin K. Petersen wrote:
>>>>>> "Sagi" == Sagi Grimberg <sagig@dev.mellanox.co.il> writes:
> Sagi> I originally wrote the code to support that. But it got left
> Sagi> behind since I figured it is not an interesting use-case.  If your
> Sagi> beckend doesn't support T10-PI why should the target publish it
> Sagi> support it and ask the device to strip/insert it?  I suppose it is
> Sagi> to allow the initiator to protect half-way, but I don't know how
> Sagi> interesting it is if the data is not stored with protection...
>
> That depends what you do on the backend. There are several devices out
> there that expose PI to the host but use a different protection scheme
> internally. And then synthesize PI on the host-facing side. Some even do
> T10 PI to an internal protection scheme and then back to T10 PI when
> talking to the disk drives in the back end.
>

Hey Martin,

I understand, but even for internal different T10-PI schemes, is 
stripping protection from incoming data
at the fabric level (and then do whatever with it in the backend level) 
the right thing to do here?
I mean we basically lose protection across the PCI with this scheme 
aren't we?

Sagi.