From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WXw81-00078g-30 for qemu-devel@nongnu.org; Wed, 09 Apr 2014 13:17:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WXw7s-0001jM-1R for qemu-devel@nongnu.org; Wed, 09 Apr 2014 13:17:37 -0400 Received: from mail-qc0-x229.google.com ([2607:f8b0:400d:c01::229]:59840) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WXw7r-0001jI-Tg for qemu-devel@nongnu.org; Wed, 09 Apr 2014 13:17:27 -0400 Received: by mail-qc0-f169.google.com with SMTP id i17so3094806qcy.14 for ; Wed, 09 Apr 2014 10:17:27 -0700 (PDT) Sender: Richard Henderson Message-ID: <534580A0.6030908@twiddle.net> Date: Wed, 09 Apr 2014 10:17:20 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1396555000-8205-1-git-send-email-rth@twiddle.net> <1396555000-8205-22-git-send-email-rth@twiddle.net> <534542E8.10006@huawei.com> In-Reply-To: <534542E8.10006@huawei.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 21/26] tcg-aarch64: Introduce tcg_out_insn_3507 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Claudio Fontana , qemu-devel@nongnu.org Cc: claudio.fontana@gmail.com On 04/09/2014 05:54 AM, Claudio Fontana wrote: > During testing I found this patch causes a regression for big endian targets (sparc). > > Can you take a look? > I think it might be related to the extended form of the REV instruction needing > an additional 0x400. See below. You're right. It's disassembling as "rev32 x0, x0". Bizzarely, sparc32 bios was working. I guess it only uses 64-bit load/store for ldd/std for register pair save and restore. And since we rev'ed them the same way for load/store, it worked. Uploading a full mipseb system image to test now. r~