From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?Christian_K=F6nig?= Subject: Re: [git pull] drm fixes Date: Sun, 20 Apr 2014 17:23:19 +0200 Message-ID: <5353E667.3050701@vodafone.de> References: <20140419190305.GA267@x4> <20140420062450.GA281@x4> <535384FC.1060708@vodafone.de> <20140420095612.GA268@x4> <20140420100419.GA283@x4> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------070004000600030309070802" Return-path: Received: from pegasos-out.vodafone.de (pegasos-out.vodafone.de [80.84.1.38]) by gabe.freedesktop.org (Postfix) with ESMTP id C12216E1B8 for ; Sun, 20 Apr 2014 08:23:33 -0700 (PDT) In-Reply-To: <20140420100419.GA283@x4> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Markus Trippelsdorf Cc: DRI mailing list List-Id: dri-devel@lists.freedesktop.org This is a multi-part message in MIME format. --------------070004000600030309070802 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable Dropping Linus and LKML for now. Does the attached patch help? If not please open up a bug, tracking all=20 those logs in mails can become quite painful. Christian. Am 20.04.2014 12:04, schrieb Markus Trippelsdorf: > On 2014.04.20 at 11:56 +0200, Markus Trippelsdorf wrote: >> On 2014.04.20 at 10:27 +0200, Christian K=F6nig wrote: >>>> I did and it doesn't fix the issue. >>> In this case please open up a new bugreport on >>> https://bugs.freedesktop.org/enter_bug.cgi?product=3DDRI and select >>> DRM/Radeon as component. >>> >>> Additional to that please provide a dmesg output generated with >>> drm.debug=3D0xE for both the good and the bad case. >> Good vs. bad: > Sorry it is actually bad vs. good: > >> -[drm:radeon_compute_pll_avivo] 146250 - 14439, pll dividers - fb: 204= 7.0 ref: 29, post 7 >> +[drm:radeon_compute_pll_avivo] 146250 - 14955, pll dividers - fb: 102= 3.5 ref: 14, post 7 --------------070004000600030309070802 Content-Type: text/x-diff; name="0001-drm-radeon-improve-PLL-limit-handling-in-post-div-ca.patch" Content-Disposition: attachment; filename*0="0001-drm-radeon-improve-PLL-limit-handling-in-post-div-ca.pa"; filename*1="tch" Content-Transfer-Encoding: quoted-printable >>From c2fb3094669a3205f16a32f4119d0afe40b1a1fd Mon Sep 17 00:00:00 2001 From: =3D?UTF-8?q?Christian=3D20K=3DC3=3DB6nig?=3D Date: Sun, 20 Apr 2014 13:24:32 +0200 Subject: [PATCH] drm/radeon: improve PLL limit handling in post div calculation MIME-Version: 1.0 Content-Type: text/plain; charset=3DUTF-8 Content-Transfer-Encoding: 8bit This improves the PLL parameters when we work at the limits of the allowed ranges. Signed-off-by: Christian K=C3=B6nig --- drivers/gpu/drm/radeon/radeon_display.c | 77 ++++++++++++++++++++++-----= ------ 1 file changed, 51 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/ra= deon/radeon_display.c index e6c3c54..8d99d5e 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -840,6 +840,38 @@ static void avivo_reduce_ratio(unsigned *nom, unsign= ed *den, } =20 /** + * avivo_get_fb_ref_div - feedback and ref divider calculation + * + * @nom: nominator + * @den: denominator + * @post_div: post divider + * @fb_div_max: feedback divider maximum + * @ref_div_max: reference divider maximum + * @fb_div: resulting feedback divider + * @ref_div: resulting reference divider + * + * Calculate feedback and reference divider for a given post divider. Ma= kes + * sure we stay within the limits. + */ +static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned po= st_div, + unsigned fb_div_max, unsigned ref_div_max, + unsigned *fb_div, unsigned *ref_div) +{ + /* limit reference * post divider to a maximum */ + ref_div_max =3D min(210 / post_div, ref_div_max); + + /* get matching reference and feedback divider */ + *ref_div =3D min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max= ); + *fb_div =3D DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); + + /* limit fb divider to its maximum */ + if (*fb_div > fb_div_max) { + *ref_div =3D DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); + *fb_div =3D fb_div_max; + } +} + +/** * radeon_compute_pll_avivo - compute PLL paramaters * * @pll: information about the PLL @@ -860,6 +892,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, u32 *ref_div_p, u32 *post_div_p) { + unsigned target_clock =3D pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? + freq : freq / 10; + unsigned fb_div_min, fb_div_max, fb_div; unsigned post_div_min, post_div_max, post_div; unsigned ref_div_min, ref_div_max, ref_div; @@ -892,7 +927,6 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, post_div_min =3D pll->post_div; post_div_max =3D pll->post_div; } else { - unsigned target_clock =3D freq / 10; unsigned vco_min, vco_max; =20 if (pll->flags & RADEON_PLL_IS_LCD) { @@ -903,6 +937,11 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll= , vco_max =3D pll->pll_out_max; } =20 + if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { + vco_min *=3D 10; + vco_max *=3D 10; + } + post_div_min =3D vco_min / target_clock; if ((target_clock * post_div_min) < vco_min) ++post_div_min; @@ -917,7 +956,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, } =20 /* represent the searched ratio as fractional number */ - nom =3D pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? freq : freq / 10; + nom =3D target_clock; den =3D pll->reference_freq; =20 /* reduce the numbers to a simpler ratio */ @@ -931,7 +970,12 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll= , diff_best =3D ~0; =20 for (post_div =3D post_div_min; post_div <=3D post_div_max; ++post_div)= { - unsigned diff =3D abs(den - den / post_div * post_div); + unsigned diff; + avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, + ref_div_max, &fb_div, &ref_div); + diff =3D abs(target_clock - (pll->reference_freq * fb_div) / + (ref_div * post_div)); + if (diff < diff_best || (diff =3D=3D diff_best && !(pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP))) { =20 @@ -941,28 +985,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll= , } post_div =3D post_div_best; =20 - /* limit reference * post divider to a maximum */ - ref_div_max =3D min(210 / post_div, ref_div_max); - - /* get matching reference and feedback divider */ - ref_div =3D max(DIV_ROUND_CLOSEST(den, post_div), 1u); - fb_div =3D DIV_ROUND_CLOSEST(nom * ref_div * post_div, den); - - /* we're almost done, but reference and feedback - divider might be to large now */ - - nom =3D fb_div; - den =3D ref_div; - - if (fb_div > fb_div_max) { - ref_div =3D DIV_ROUND_CLOSEST(den * fb_div_max, nom); - fb_div =3D fb_div_max; - } - - if (ref_div > ref_div_max) { - ref_div =3D ref_div_max; - fb_div =3D DIV_ROUND_CLOSEST(nom * ref_div_max, den); - } + /* get the feedback and reference divider for the optimal value */ + avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, ref_div_max, + &fb_div, &ref_div); =20 /* reduce the numbers to a simpler ratio once more */ /* this also makes sure that the reference divider is large enough */ @@ -984,7 +1009,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll= , *post_div_p =3D post_div; =20 DRM_DEBUG_KMS("%d - %d, pll dividers - fb: %d.%d ref: %d, post %d\n", - freq, *dot_clock_p, *fb_div_p, *frac_fb_div_p, + freq, *dot_clock_p * 10, *fb_div_p, *frac_fb_div_p, ref_div, post_div); } =20 --=20 1.9.1 --------------070004000600030309070802 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel --------------070004000600030309070802--