From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51666) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1RhK-0006mR-OE for qemu-devel@nongnu.org; Sun, 29 Jun 2014 22:52:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X1RhE-0002BG-IJ for qemu-devel@nongnu.org; Sun, 29 Jun 2014 22:52:02 -0400 Received: from mga09.intel.com ([134.134.136.24]:19357) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X1RhE-0002B5-CY for qemu-devel@nongnu.org; Sun, 29 Jun 2014 22:51:56 -0400 Message-ID: <53B0D0C5.60000@intel.com> Date: Mon, 30 Jun 2014 10:51:49 +0800 From: "Chen, Tiejun" MIME-Version: 1.0 References: <1403662641-28526-1-git-send-email-tiejun.chen@intel.com> <53AA69E7.8050406@redhat.com> <53AA7BD7.1080309@intel.com> <53AA7DCE.2030100@redhat.com> <20140625083121.GC32652@redhat.com> <53AA8ACF.3070101@redhat.com> <20140625084835.GF32652@redhat.com> <53AA8E7D.809@intel.com> <20140625090925.GH32652@redhat.com> <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <53AA9C4E.9070506@redhat.com> <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> In-Reply-To: <53ABF00E.6000309@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , "Michael S. Tsirkin" , anthony.perard@citrix.com Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, anthony@codemonkey.ws, yang.z.zhang@intel.com On 2014/6/26 18:03, Paolo Bonzini wrote: > Il 26/06/2014 11:18, Chen, Tiejun ha scritto: >> >>> >>> - offsets 0x0000..0x0fff map to configuration space of the host MCH >>> >> >> Are you saying the config space in the video device? > > No, I am saying in a new BAR, or at some magic offset of an existing > MMIO BAR. > As I mentioned previously, the IGD guy told me we have no any unused a offset or BAR in the config space. And guy who are responsible for the native driver seems not be accept to extend some magic offset of an existing MMIO BAR. In addition I think in a short time its not possible to migrate i440fx to q35 as a PCIe machine of xen. So could we do this step by step: #1 phase: We just cover current qemu-xen implementation based on i44fx, so still provide that pseudo ISA bridge at 00:1f.0 as we already did. #2 phase: Now, we will choose a capability ID that won't be conflicting with others. To do this properly, we need to get one from PCI SIG group. To have this workable and consistently validated, this method shouldn't be virt specific. Then native driver should use the same method. So when xen work on q35 PCIe machine, we can walk this way. Anthony, Any comments to address this in xen case? Thanks Tiejun From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Chen, Tiejun" Subject: Re: [v5][PATCH 0/5] xen: add Intel IGD passthrough support Date: Mon, 30 Jun 2014 10:51:49 +0800 Message-ID: <53B0D0C5.60000@intel.com> References: <1403662641-28526-1-git-send-email-tiejun.chen@intel.com> <53AA69E7.8050406@redhat.com> <53AA7BD7.1080309@intel.com> <53AA7DCE.2030100@redhat.com> <20140625083121.GC32652@redhat.com> <53AA8ACF.3070101@redhat.com> <20140625084835.GF32652@redhat.com> <53AA8E7D.809@intel.com> <20140625090925.GH32652@redhat.com> <53AA9480.1010005@intel.com> <53AA96DF.6070501@redhat.com> <53AA9B58.6050803@intel.com> <53AA9C4E.9070506@redhat.com> <53ABE551.3080407@intel.com> <53ABF00E.6000309@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <53ABF00E.6000309@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org Sender: qemu-devel-bounces+gceq-qemu-devel=gmane.org@nongnu.org To: Paolo Bonzini , "Michael S. Tsirkin" , anthony.perard@citrix.com Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com, anthony@codemonkey.ws, yang.z.zhang@intel.com List-Id: xen-devel@lists.xenproject.org On 2014/6/26 18:03, Paolo Bonzini wrote: > Il 26/06/2014 11:18, Chen, Tiejun ha scritto: >> >>> >>> - offsets 0x0000..0x0fff map to configuration space of the host MCH >>> >> >> Are you saying the config space in the video device? > > No, I am saying in a new BAR, or at some magic offset of an existing > MMIO BAR. > As I mentioned previously, the IGD guy told me we have no any unused a offset or BAR in the config space. And guy who are responsible for the native driver seems not be accept to extend some magic offset of an existing MMIO BAR. In addition I think in a short time its not possible to migrate i440fx to q35 as a PCIe machine of xen. So could we do this step by step: #1 phase: We just cover current qemu-xen implementation based on i44fx, so still provide that pseudo ISA bridge at 00:1f.0 as we already did. #2 phase: Now, we will choose a capability ID that won't be conflicting with others. To do this properly, we need to get one from PCI SIG group. To have this workable and consistently validated, this method shouldn't be virt specific. Then native driver should use the same method. So when xen work on q35 PCIe machine, we can walk this way. Anthony, Any comments to address this in xen case? Thanks Tiejun