From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755657AbaHARyP (ORCPT ); Fri, 1 Aug 2014 13:54:15 -0400 Received: from mblankhorst.nl ([141.105.120.124]:56647 "EHLO mblankhorst.nl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751858AbaHARyO (ORCPT ); Fri, 1 Aug 2014 13:54:14 -0400 X-Greylist: delayed 472 seconds by postgrey-1.27 at vger.kernel.org; Fri, 01 Aug 2014 13:54:14 EDT Message-ID: <53DBD269.80807@canonical.com> Date: Fri, 01 Aug 2014 19:46:17 +0200 From: Maarten Lankhorst User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: =?UTF-8?B?Q2hyaXN0aWFuIEvDtm5pZw==?= , airlied@linux.ie CC: thellstrom@vmware.com, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, bskeggs@redhat.com, alexander.deucher@amd.com Subject: Re: [PATCH 09/19] drm/radeon: handle lockup in delayed work, v2 References: <20140731153245.15061.63023.stgit@patser> <20140731153342.15061.54264.stgit@patser> <53DBC1EC.1010001@amd.com> In-Reply-To: <53DBC1EC.1010001@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01-08-14 18:35, Christian König wrote: > Am 31.07.2014 um 17:33 schrieb Maarten Lankhorst: >> Signed-off-by: Maarten Lankhorst >> --- >> V1 had a nasty bug breaking gpu lockup recovery. The fix is not >> allowing radeon_fence_driver_check_lockup to take exclusive_lock, >> and kill it during lockup recovery instead. > > That looks like the delayed work starts running as soon as we submit a fence, and not when it's needed for waiting. > > Since it's a backup for failing IRQs I would rather put it into radeon_irq_kms.c and start/stop it when the IRQs are started/stoped. The delayed work is not just for failing irq's, it's also the handler that's used to detect lockups, which is why I trigger after processing fences, and reset the timer after processing. Specifically what happened was this scenario: - lock up occurs - write lock taken by gpu_reset - delayed work runs, tries to acquire read lock, blocks - gpu_reset tries to cancel delayed work synchronously - has to wait for delayed work to finish -> deadlock ~Maarten From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maarten Lankhorst Subject: Re: [PATCH 09/19] drm/radeon: handle lockup in delayed work, v2 Date: Fri, 01 Aug 2014 19:46:17 +0200 Message-ID: <53DBD269.80807@canonical.com> References: <20140731153245.15061.63023.stgit@patser> <20140731153342.15061.54264.stgit@patser> <53DBC1EC.1010001@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <53DBC1EC.1010001@amd.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: =?UTF-8?B?Q2hyaXN0aWFuIEvDtm5pZw==?= , airlied@linux.ie Cc: thellstrom@vmware.com, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, bskeggs@redhat.com, alexander.deucher@amd.com List-Id: nouveau.vger.kernel.org CgpPbiAwMS0wOC0xNCAxODozNSwgQ2hyaXN0aWFuIEvDtm5pZyB3cm90ZToKPiBBbSAzMS4wNy4y MDE0IHVtIDE3OjMzIHNjaHJpZWIgTWFhcnRlbiBMYW5raG9yc3Q6Cj4+IFNpZ25lZC1vZmYtYnk6 IE1hYXJ0ZW4gTGFua2hvcnN0IDxtYWFydGVuLmxhbmtob3JzdEBjYW5vbmljYWwuY29tPgo+PiAt LS0KPj4gVjEgaGFkIGEgbmFzdHkgYnVnIGJyZWFraW5nIGdwdSBsb2NrdXAgcmVjb3ZlcnkuIFRo ZSBmaXggaXMgbm90Cj4+IGFsbG93aW5nIHJhZGVvbl9mZW5jZV9kcml2ZXJfY2hlY2tfbG9ja3Vw IHRvIHRha2UgZXhjbHVzaXZlX2xvY2ssCj4+IGFuZCBraWxsIGl0IGR1cmluZyBsb2NrdXAgcmVj b3ZlcnkgaW5zdGVhZC4KPiAKPiBUaGF0IGxvb2tzIGxpa2UgdGhlIGRlbGF5ZWQgd29yayBzdGFy dHMgcnVubmluZyBhcyBzb29uIGFzIHdlIHN1Ym1pdCBhIGZlbmNlLCBhbmQgbm90IHdoZW4gaXQn cyBuZWVkZWQgZm9yIHdhaXRpbmcuCj4gCj4gU2luY2UgaXQncyBhIGJhY2t1cCBmb3IgZmFpbGlu ZyBJUlFzIEkgd291bGQgcmF0aGVyIHB1dCBpdCBpbnRvIHJhZGVvbl9pcnFfa21zLmMgYW5kIHN0 YXJ0L3N0b3AgaXQgd2hlbiB0aGUgSVJRcyBhcmUgc3RhcnRlZC9zdG9wZWQuCgpUaGUgZGVsYXll ZCB3b3JrIGlzIG5vdCBqdXN0IGZvciBmYWlsaW5nIGlycSdzLCBpdCdzIGFsc28gdGhlIGhhbmRs ZXIgdGhhdCdzIHVzZWQgdG8gZGV0ZWN0IGxvY2t1cHMsIHdoaWNoIGlzIHdoeSBJIHRyaWdnZXIg YWZ0ZXIgcHJvY2Vzc2luZyBmZW5jZXMsIGFuZCByZXNldCB0aGUgdGltZXIgYWZ0ZXIgcHJvY2Vz c2luZy4KClNwZWNpZmljYWxseSB3aGF0IGhhcHBlbmVkIHdhcyB0aGlzIHNjZW5hcmlvOgoKLSBs b2NrIHVwIG9jY3VycwotIHdyaXRlIGxvY2sgdGFrZW4gYnkgZ3B1X3Jlc2V0Ci0gZGVsYXllZCB3 b3JrIHJ1bnMsIHRyaWVzIHRvIGFjcXVpcmUgcmVhZCBsb2NrLCBibG9ja3MKLSBncHVfcmVzZXQg dHJpZXMgdG8gY2FuY2VsIGRlbGF5ZWQgd29yayBzeW5jaHJvbm91c2x5Ci0gaGFzIHRvIHdhaXQg Zm9yIGRlbGF5ZWQgd29yayB0byBmaW5pc2ggLT4gZGVhZGxvY2sKCn5NYWFydGVuCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5n IGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==