All of lore.kernel.org
 help / color / mirror / Atom feed
From: Olav Haugan <ohaugan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: "linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
	<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v2 2/2] iommu/arm-smmu: Do not access non-existing SMR registers
Date: Fri, 08 Aug 2014 11:51:54 -0700	[thread overview]
Message-ID: <53E51C4A.1060208@codeaurora.org> (raw)
In-Reply-To: <20140807092254.GH13703-5wv7dgnIgG8@public.gmane.org>

On 8/7/2014 2:22 AM, Will Deacon wrote:
> On Thu, Aug 07, 2014 at 12:34:09AM +0100, Olav Haugan wrote:
>> On 8/6/2014 10:35 AM, Will Deacon wrote:
>>> Hmm, I'm checking this with the architects because the TRMs aren't exactly
>>> clear. The NUMSMRG works for stream-indexing (i.e. reports the number of
>>> S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since
>>> those registers will be SBZP.
>>
>> You don't agree that we should avoid doing register writes if not
>> necessarily? In general I like to avoid trying to write registers that
>> is not needed so that we don't do more work than needed.
> 
> If this was a fast-path then I'd certainly agree. However, device reset is
> a pretty rare event and I'd be inclined to err on the side of code clarity
> in preference to performance.
> 
> Anyway, it turns out that we can't use NUMSMRG for this so all that's moot.
> We instead need to do 1 << SMMU_IDR0.NUMSIDB, which will give us the number
> of S2CRs.
> 
>>>> As far as I can tell there are no other register telling us how many S2CR
>>>> registers exist. That also brings up another point that there is no check
>>>> in the code to ensure we are not trying to program more than the available
>>>> S2CR registers when we use stream indexing.
>>>
>>> On an SMMU using stream-indexing, if the StreamID goes off the end of the
>>> S2CRs that's a fairly serious hardware configuration issue which I don't
>>> think Linux is in a position to handle. I agree that a warning wouldn't
>>> hurt on device add/attach though.
>>>
>>
>> Yes, I meant to protect against programming errors where someone
>> specified more Stream IDs than available S2CRs.
> 
> Sure. Could you have a go at hacking this up, please?
> 

Yes, I'll update the patches. Thanks for clarifying how to determine the
# of S2CRs.

Thanks,

Olav

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID
From: ohaugan@codeaurora.org (Olav Haugan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/2] iommu/arm-smmu: Do not access non-existing SMR registers
Date: Fri, 08 Aug 2014 11:51:54 -0700	[thread overview]
Message-ID: <53E51C4A.1060208@codeaurora.org> (raw)
In-Reply-To: <20140807092254.GH13703@arm.com>

On 8/7/2014 2:22 AM, Will Deacon wrote:
> On Thu, Aug 07, 2014 at 12:34:09AM +0100, Olav Haugan wrote:
>> On 8/6/2014 10:35 AM, Will Deacon wrote:
>>> Hmm, I'm checking this with the architects because the TRMs aren't exactly
>>> clear. The NUMSMRG works for stream-indexing (i.e. reports the number of
>>> S2CRs), then all we have to do is change the above ~SMR_VALID to 0x0, since
>>> those registers will be SBZP.
>>
>> You don't agree that we should avoid doing register writes if not
>> necessarily? In general I like to avoid trying to write registers that
>> is not needed so that we don't do more work than needed.
> 
> If this was a fast-path then I'd certainly agree. However, device reset is
> a pretty rare event and I'd be inclined to err on the side of code clarity
> in preference to performance.
> 
> Anyway, it turns out that we can't use NUMSMRG for this so all that's moot.
> We instead need to do 1 << SMMU_IDR0.NUMSIDB, which will give us the number
> of S2CRs.
> 
>>>> As far as I can tell there are no other register telling us how many S2CR
>>>> registers exist. That also brings up another point that there is no check
>>>> in the code to ensure we are not trying to program more than the available
>>>> S2CR registers when we use stream indexing.
>>>
>>> On an SMMU using stream-indexing, if the StreamID goes off the end of the
>>> S2CRs that's a fairly serious hardware configuration issue which I don't
>>> think Linux is in a position to handle. I agree that a warning wouldn't
>>> hurt on device add/attach though.
>>>
>>
>> Yes, I meant to protect against programming errors where someone
>> specified more Stream IDs than available S2CRs.
> 
> Sure. Could you have a go at hacking this up, please?
> 

Yes, I'll update the patches. Thanks for clarifying how to determine the
# of S2CRs.

Thanks,

Olav

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

  parent reply	other threads:[~2014-08-08 18:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-08-04 18:01 [PATCH v2 0/2] arm-smmu fixes for CBn_TCR and S2CR/SMR programming Olav Haugan
2014-08-04 18:01 ` Olav Haugan
2014-08-04 18:01 ` [PATCH v2 1/2] iommu/arm-smmu: Fix programming of SMMU_CBn_TCR for stage 1 Olav Haugan
2014-08-04 18:01   ` Olav Haugan
2014-08-04 18:01 ` [PATCH v2 2/2] iommu/arm-smmu: Do not access non-existing SMR registers Olav Haugan
2014-08-04 18:01   ` Olav Haugan
2014-08-06 10:19   ` Will Deacon
2014-08-06 10:19     ` Will Deacon
2014-08-06 16:44     ` Olav Haugan
2014-08-06 16:44       ` Olav Haugan
     [not found]       ` <53E25B76.6090208-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2014-08-06 17:35         ` Will Deacon
2014-08-06 17:35           ` Will Deacon
     [not found]           ` <20140806173518.GG25953-5wv7dgnIgG8@public.gmane.org>
2014-08-06 23:34             ` Olav Haugan
2014-08-06 23:34               ` Olav Haugan
2014-08-07  9:22               ` Will Deacon
2014-08-07  9:22                 ` Will Deacon
     [not found]                 ` <20140807092254.GH13703-5wv7dgnIgG8@public.gmane.org>
2014-08-08 18:51                   ` Olav Haugan [this message]
2014-08-08 18:51                     ` Olav Haugan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=53E51C4A.1060208@codeaurora.org \
    --to=ohaugan-sgv2jx0feol9jmxxk+q4oq@public.gmane.org \
    --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
    --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=will.deacon-5wv7dgnIgG8@public.gmane.org \
    --subject='Re: [PATCH v2 2/2] iommu/arm-smmu: Do not access non-existing SMR registers' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.