From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Wed, 20 Aug 2014 13:24:07 -0600 Subject: [U-Boot] [PATCH 5/9] ARM: tegra: Enable non-cached memory In-Reply-To: <1408348852-30894-6-git-send-email-thierry.reding@gmail.com> References: <1408348852-30894-1-git-send-email-thierry.reding@gmail.com> <1408348852-30894-6-git-send-email-thierry.reding@gmail.com> Message-ID: <53F4F5D7.40306@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 08/18/2014 02:00 AM, Thierry Reding wrote: > From: Thierry Reding > > Some boards, most notably those with a PCIe ethernet NIC, require this > to avoid cache coherency problems. Since the option adds very little > code and overhead enable it across all Tegra generations. Other drivers > may also start supporting this functionality at some point, so enabling > it now will automatically reap the benefits later on. Acked-by: Stephen Warren