From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39853) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLqOB-0004gN-P8 for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:16:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XLqO6-0002dQ-0B for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:16:35 -0400 Received: from mail-la0-x230.google.com ([2a00:1450:4010:c03::230]:61500) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLqO5-0002dC-Ou for qemu-devel@nongnu.org; Mon, 25 Aug 2014 05:16:29 -0400 Received: by mail-la0-f48.google.com with SMTP id gl10so12595325lab.35 for ; Mon, 25 Aug 2014 02:16:27 -0700 (PDT) Message-ID: <53FAFEEA.2090009@gmail.com> Date: Mon, 25 Aug 2014 13:16:26 +0400 From: Sergey Fedorov MIME-Version: 1.0 References: <1408703392-23893-1-git-send-email-aggelerf@ethz.ch> <1408703392-23893-2-git-send-email-aggelerf@ethz.ch> In-Reply-To: <1408703392-23893-2-git-send-email-aggelerf@ethz.ch> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 01/15] hw/intc/arm_gic: Request FIQ sources List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Fabian Aggeler , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, edgar.iglesias@gmail.com, christoffer.dall@linaro.org, greg.bellows@linaro.org On 22.08.2014 14:29, Fabian Aggeler wrote: > Preparing for FIQ lines from GIC to CPUs, which is needed for GIC > Security Extensions. > > Signed-off-by: Fabian Aggeler > --- > hw/intc/arm_gic.c | 3 +++ > include/hw/intc/arm_gic_common.h | 1 + > 2 files changed, 4 insertions(+) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index 1532ef9..b27bd0e 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -786,6 +786,9 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq) > for (i = 0; i < NUM_CPU(s); i++) { > sysbus_init_irq(sbd, &s->parent_irq[i]); > } > + for (i = 0; i < NUM_CPU(s); i++) { > + sysbus_init_irq(sbd, &s->parent_fiq[i]); > + } Hi Fabian, I would suggest to provide a way to get a sysbus IRQ/FIQ number for each processor, e.g. a dedicated macro. Maybe it could be easier to accomplish this by initializing IRQ and FIQ interleaved or by always initializing GIC_NCPU IRQs/FIQs. Regards, Sergey > memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s, > "gic_dist", 0x1000); > } > diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h > index f6887ed..01c6f24 100644 > --- a/include/hw/intc/arm_gic_common.h > +++ b/include/hw/intc/arm_gic_common.h > @@ -50,6 +50,7 @@ typedef struct GICState { > /*< public >*/ > > qemu_irq parent_irq[GIC_NCPU]; > + qemu_irq parent_fiq[GIC_NCPU]; > bool enabled; > bool cpu_enabled[GIC_NCPU]; >