From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH] KVM: x86: keep EOI exit bitmap accurate before loading it. Date: Tue, 26 Aug 2014 13:00:07 +0200 Message-ID: <53FC68B7.9080304@redhat.com> References: <1409070465-31272-1-git-send-email-wei.w.wang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Cc: alex.williamson@redhat.com, Yang Zhang To: Wei Wang , kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:31530 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754379AbaHZLAM (ORCPT ); Tue, 26 Aug 2014 07:00:12 -0400 In-Reply-To: <1409070465-31272-1-git-send-email-wei.w.wang@intel.com> Sender: kvm-owner@vger.kernel.org List-ID: Il 26/08/2014 18:27, Wei Wang ha scritto: > Guest may mask the IOAPIC entry before issue EOI. In such case, > EOI will not be intercepted by hypervisor, since the corrensponding > bit in eoi exit bitmap is not set after the masking of IOAPIC entry. > > The solution here is to OR EOI_exit_bitmap with tmr. > > Tested-by: Rongrong Liu > Signed-off-by: Yang Zhang > Signed-off-by: Wei Wang > --- > arch/x86/kvm/lapic.c | 9 +++++++++ > arch/x86/kvm/lapic.h | 2 ++ > arch/x86/kvm/x86.c | 1 + > virt/kvm/ioapic.c | 6 +++--- > 4 files changed, 15 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index 93c2e93..759d24e 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -533,6 +533,15 @@ void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr) > } > } > > +void kvm_apic_update_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap, > + u32 *tmr) > +{ > + u32 i; > + > + for (i = 0; i < 8; i++) > + *((u32 *)eoi_exit_bitmap + i) |= tmr[i]; > +} > + > static void apic_update_ppr(struct kvm_lapic *apic) > { > u32 tpr, isrv, ppr, old_ppr; > diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h > index 6a11845..eda7be7 100644 > --- a/arch/x86/kvm/lapic.h > +++ b/arch/x86/kvm/lapic.h > @@ -55,6 +55,8 @@ void kvm_apic_set_version(struct kvm_vcpu *vcpu); > > void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr); > void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir); > +void kvm_apic_update_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap, > + u32 *tmr); > int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest); > int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda); > int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq, > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index d401684..4042bc0 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -5992,6 +5992,7 @@ static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu) > > kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr); > kvm_apic_update_tmr(vcpu, tmr); > + kvm_apic_update_eoi_exitmap(vcpu, eoi_exit_bitmap, tmr); As mentioned before, you can read the TMR registers from the APIC, instead of modifying the tmr array in kvm_apic_update_tmr. Paolo > kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap); > } > > diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c > index e8ce34c..ea5f697 100644 > --- a/virt/kvm/ioapic.c > +++ b/virt/kvm/ioapic.c > @@ -254,9 +254,9 @@ void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap, > spin_lock(&ioapic->lock); > for (index = 0; index < IOAPIC_NUM_PINS; index++) { > e = &ioapic->redirtbl[index]; > - if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG || > - kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) || > - index == RTC_GSI) { > + if (!e->fields.mask && e->fields.trig_mode == IOAPIC_LEVEL_TRIG > + || kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, > + index) || index == RTC_GSI) { > if (kvm_apic_match_dest(vcpu, NULL, 0, > e->fields.dest_id, e->fields.dest_mode)) { > __set_bit(e->fields.vector, >