From: "Jan Beulich" <JBeulich@suse.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc: Yang Z Zhang <yang.z.zhang@intel.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Kevin Tian <kevin.tian@intel.com>,
Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>,
Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH] x86/ats: Disable Address Translation Services by default
Date: Thu, 28 Aug 2014 08:32:33 +0100 [thread overview]
Message-ID: <53FEF731020000780002E7A9@mail.emea.novell.com> (raw)
In-Reply-To: <53FED55B.5030109@amd.com>
>>> On 28.08.14 at 09:08, <suravee.suthikulpanit@amd.com> wrote:
> I have verified that PCI device pass-through works with ATS disabled.
> Although, could you please help described how "asynchronous queued
> invalidation support" supposed to work?
Are asking about the abstract model, or the specific implementation?
The former is quite obvious is think (utilize the respective interrupt to
get notified of completions and suspend the execution in the current
context until then), while the latter isn't clear at all at this point, due
to it being necessary to inspect all involved code paths to see how
exactly suspension can be carried out.
Also, QI is - afaik - a VT-d specific feature anyway, i.e. doesn't have
a direct equivalent on the AMD side...
Jan
next prev parent reply other threads:[~2014-08-28 7:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 16:01 [PATCH] x86/ats: Disable Address Translation Services by default Andrew Cooper
2014-08-22 12:39 ` Jan Beulich
2014-08-27 0:37 ` Zhang, Yang Z
2014-08-27 6:21 ` Jan Beulich
2014-08-28 7:08 ` Suravee Suthikulpanit
2014-08-28 7:32 ` Jan Beulich [this message]
2014-08-28 8:18 ` Suravee Suthikulpanit
2014-08-28 8:30 ` Jan Beulich
2014-08-28 10:07 ` Suravee Suthikulpanit
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