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[88.21.201.14]) by smtp.gmail.com with ESMTPSA id x2sm31109104wrn.81.2019.10.16.05.44.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Oct 2019 05:44:53 -0700 (PDT) Subject: Re: [PULL 59/68] aspeed: Add an AST2600 eval board To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Peter Maydell , QEMU Developers , Joel Stanley References: <20191014160404.19553-1-peter.maydell@linaro.org> <20191014160404.19553-60-peter.maydell@linaro.org> <2f6dd2bc-27e7-91a2-e673-18b9715a9628@redhat.com> <81879465-e235-e146-46d9-b8e1441b30cf@kaod.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <53a6663a-bfbc-b90c-a982-46aeee838f19@redhat.com> Date: Wed, 16 Oct 2019 14:44:52 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.0 MIME-Version: 1.0 In-Reply-To: <81879465-e235-e146-46d9-b8e1441b30cf@kaod.org> Content-Language: en-US X-MC-Unique: Ax_RvExDObytHLVcZYcEDA-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/16/19 2:41 PM, C=C3=A9dric Le Goater wrote: > On 16/10/2019 14:20, Philippe Mathieu-Daud=C3=A9 wrote: >> Hi Peter, >> >> On 10/15/19 7:03 PM, Peter Maydell wrote: >>> On Mon, 14 Oct 2019 at 17:05, Peter Maydell = wrote: >>>> >>>> From: C=C3=A9dric Le Goater >>>> >>>> Signed-off-by: C=C3=A9dric Le Goater >>>> Reviewed-by: Joel Stanley >>>> Message-id: 20190925143248.10000-21-clg@kaod.org >>>> Signed-off-by: Peter Maydell >>>> --- >>>> =C2=A0 include/hw/arm/aspeed.h |=C2=A0 1 + >>>> =C2=A0 hw/arm/aspeed.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0 | 23 +++++++++++++++++++++++ >>>> =C2=A0 2 files changed, 24 insertions(+) >>> >>>> @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = =3D { >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .num_cs=C2=A0= =C2=A0=C2=A0 =3D 2, >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .i2c_init=C2= =A0 =3D witherspoon_bmc_i2c_init, >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .ram=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D 512 * MiB, >>>> +=C2=A0=C2=A0=C2=A0 }, { >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .name=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 =3D MACHINE_TYPE_NAME("ast2600-evb"), >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .desc=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 =3D "Aspeed AST2600 EVB (Cortex A7)", >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .soc_name=C2=A0 =3D "ast26= 00-a0", >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .hw_strap1 =3D AST2600_EVB= _HW_STRAP1, >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .hw_strap2 =3D AST2600_EVB= _HW_STRAP2, >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .fmc_model =3D "w25q512jv"= , >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .spi_model =3D "mx66u51235= f", >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .num_cs=C2=A0=C2=A0=C2=A0 = =3D 1, >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .i2c_init=C2=A0 =3D ast260= 0_evb_i2c_init, >>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .ram=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 =3D 2 * GiB, >>> >>> Hi. I just discovered that this makes 'make check' fail on >>> 32-bit systems, because you can't default to 2GB of RAM >>> for a board: >>> >>> (armhf)pmaydell@mustang-maydell:~/qemu$ >>> ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb >>> qemu-system-arm: at most 2047 MB RAM can be simulated >>> >>> It's also a pretty rudely large amount of RAM to allocate >>> by default: it caused 'make check' to fail on my OSX >>> box, which is 64-bits but doesn't have huge swathes >>> of free RAM. >> >> It is unlikely you use this board on a 32-bit system... >> >> You usually prefer to have modeled hardware matching real-life, >> what about making this board not available on 32-bit systems >> (we will soon have more boards like this): >> >> =C2=A0 #if HOST_LONG_BITS > 32 >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .name=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 =3D MACHINE_TYPE_NAME("ast2600-evb"), >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 .desc=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 =3D "Aspeed AST2600 EVB (Cortex A7)", >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ... >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }, >> =C2=A0 #endif /* HOST_LONG_BITS > 32 */ >=20 > I sent a patch to lower the default RAM size to 1G but you can always > increase it on the command line. >=20 > Making the machine available seems a better choice but that's fine with > me if we prefer to restrict its use to 64bits hosts. As you wish. I'd rather keep models consistent with real hardware and not cripple=20 them to test them on unlikely setups.