Sorry, only noticed this now in a discussion with David over the AMD IOMMU: On 2016-07-21 19:53, Michael S. Tsirkin wrote: > From: Peter Xu > > This patch introduces x86 IOMMU IEC (Interrupt Entry Cache) > invalidation notifier list. When vIOMMU receives IEC invalidate > request, all the registered units will be notified with specific > invalidation requests. > > Intel IOMMU is the first provider that generates such a event. > > Signed-off-by: Peter Xu > Reviewed-by: Michael S. Tsirkin > Signed-off-by: Michael S. Tsirkin > --- > hw/i386/intel_iommu_internal.h | 24 ++++++++++++++++++++---- > include/hw/i386/x86-iommu.h | 40 ++++++++++++++++++++++++++++++++++++++++ > hw/i386/intel_iommu.c | 36 +++++++++++++++++++++++++++++------- > hw/i386/x86-iommu.c | 29 +++++++++++++++++++++++++++++ > hw/i386/trace-events | 3 +++ > 5 files changed, 121 insertions(+), 11 deletions(-) > ... > @@ -57,4 +76,25 @@ struct X86IOMMUState { > */ > X86IOMMUState *x86_iommu_get_default(void); > > +/** > + * x86_iommu_iec_register_notifier - register IEC (Interrupt Entry > + * Cache) notifiers > + * @iommu: IOMMU device to register > + * @fn: IEC notifier hook function > + * @data: notifier private data > + */ > +void x86_iommu_iec_register_notifier(X86IOMMUState *iommu, > + iec_notify_fn fn, void *data); > + > +/** > + * x86_iommu_iec_notify_all - Notify IEC invalidations > + * @iommu: IOMMU device that sends the notification > + * @global: whether this is a global invalidation. If true, @index > + * and @mask are undefined. > + * @index: starting index of interrupt entry to invalidate > + * @mask: index mask for the invalidation This is Intel'ish: index and mask refer to the single Intel IR table. AMD has per-device tables. But even for Intel: Would the index make any sense to the callbacks? KVM uses (virtual and real) GSIs to address its routing entries, no? I suspect we will have to redesign this once we want to make use of non-global invalidation. Jan