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From: Julia Suvorova <jusual@mail.ru>
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Date: Fri, 15 Jun 2018 14:15:18 +0300
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Subject: Re: [Qemu-devel] [PATCH] target/arm: Allow ARMv6-M Thumb2
 instructions
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>, Stefan Hajnoczi <stefanha@redhat.com>, Joel Stanley <joel@jms.id.au>, Jim Mussared <jim@groklearning.com>, =?UTF-8?Q?Steffen_G=c3=b6rtz?= <mail@steffen-goertz.de>

On 15.06.2018 13:55, Peter Maydell wrote:
> On 12 June 2018 at 21:46, Julia Suvorova <jusual@mail.ru> wrote:
>> ARMv6-M supports 6 Thumb2 instructions. This patch checks for these
>> instructions and allows their execution.
>> Like Thumb2 cores, ARMv6-M always interprets BL instruction as 32-bit.
>>
>> This patch is required for future Cortex-M0 support.
>>
>> Signed-off-by: Julia Suvorova <jusual@mail.ru>
>> @@ -10075,6 +10076,11 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
>>   {
>>       uint32_t imm, shift, offset;
>>       uint32_t rd, rn, rm, rs;
>> +    uint32_t armv6m_insn[] = {0xf3808000 /* msr */, 0xf3b08040 /* dsb */,
>> +                              0xf3b08050 /* dmb */, 0xf3b08060 /* isb */,
>> +                              0xf3e08000 /* mrs */, 0xf000d000 /* bl */};
>> +    uint32_t armv6m_mask[] = {0xffe0d000, 0xfff0d0f0, 0xfff0d0f0,
>> +                              0xfff0d0f0, 0xffe0d000, 0xf800d000};
> 
> I think these arrays should be 'const'; we can also move them closer
> to their point of use, inside the scope of the if() below.
> 
> Since those are trivial tweaks, I'm going to put this into
> target-arm.next with those changes made, if that's OK.

Sure, thanks.

Best regards, Julia Suvorova.