From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1751319AbdBWIe7 (ORCPT <rfc822;w@1wt.eu>);
        Thu, 23 Feb 2017 03:34:59 -0500
Received: from smtp.codeaurora.org ([198.145.29.96]:58436 "EHLO
        smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1751019AbdBWIe5 (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Thu, 23 Feb 2017 03:34:57 -0500
DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1517060AC7
Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org
Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org
Subject: Re: [PATCH v2 4/4] usb: dwc3: Workaround for super-speed host on dra7
 in dual-role mode
To: Roger Quadros <rogerq@ti.com>, balbi@kernel.org
References: <1487250377-13653-1-git-send-email-rogerq@ti.com>
 <1487250377-13653-5-git-send-email-rogerq@ti.com>
Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org
From: Vivek Gautam <vivek.gautam@codeaurora.org>
Message-ID: <53cc4807-84fc-5d26-c7a9-b9efd95eedb4@codeaurora.org>
Date: Thu, 23 Feb 2017 14:04:50 +0530
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101
 Thunderbird/45.2.0
MIME-Version: 1.0
In-Reply-To: <1487250377-13653-5-git-send-email-rogerq@ti.com>
Content-Type: text/plain; charset=windows-1252; format=flowed
Content-Transfer-Encoding: 7bit
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org



On 02/16/2017 06:36 PM, Roger Quadros wrote:
> dra7 OTG core limits the host controller to USB2.0 (high-speed) mode
> when we're operating in dual-role.
>
> We work around that by bypassing the OTG core and reading the
> extcon framework directly for ID/VBUS events.
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> ---
>   Documentation/devicetree/bindings/usb/dwc3.txt |   2 +
>   drivers/usb/dwc3/core.c                        | 169 ++++++++++++++++++++++++-
>   drivers/usb/dwc3/core.h                        |   5 +
>   3 files changed, 170 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index e3e6983..9955c0d 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -53,6 +53,8 @@ Optional properties:
>    - snps,quirk-frame-length-adjustment: Value for GFLADJ_30MHZ field of GFLADJ
>   	register for post-silicon frame length adjustment when the
>   	fladj_30mhz_sdbnd signal is invalid or incorrect.
> + - extcon: phandle to the USB connector extcon device. If present, extcon
> +	device will be used to get USB cable events instead of OTG controller.
>   
>    - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
>   
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 619fa7c..b02d911 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c

[snip]

> @@ -1587,6 +1727,14 @@ static int dwc3_probe(struct platform_device *pdev)
>   
>   	dwc3_get_properties(dwc);
>   
> +	if (dev->of_node) {
> +		if (of_property_read_bool(dev->of_node, "extcon"))
> +			dwc->edev = extcon_get_edev_by_phandle(dev, 0);

Don't we want separate edev's for vbus and id ?
One can have separate pins connected to them and in that case
we can't get the events out of one pin only.

> +
> +		if (IS_ERR(dwc->edev))
> +			return PTR_ERR(dwc->edev);

  Took me a while to get to this. :)

                 if (IS_ERR(dwc->edev)) {
                        ret = PTR_ERR(dwc->edev);
                        goto err0;
                 }

We want to reset the res->start back to its original offset.

Testing this series currently. Will get back with my results.


Regards
Vivek

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project