From: Marek Vasut <marex@denx.de>
To: Tim Harvey <tharvey@gateworks.com>
Cc: u-boot@lists.denx.de, Fabio Estevam <festevam@gmail.com>,
Peng Fan <peng.fan@nxp.com>, Stefano Babic <sbabic@denx.de>
Subject: Re: [PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing
Date: Tue, 30 Aug 2022 19:40:53 +0200 [thread overview]
Message-ID: <53fe4f58-fe68-4ddf-a293-f6a6edcad56f@denx.de> (raw)
In-Reply-To: <CAJ+vNU3jekActQ3rtZS+GjiZcqViub+MiV+o5vWj=oyqu4=aOA@mail.gmail.com>
On 8/30/22 18:01, Tim Harvey wrote:
Hi,
> Marek,
>
> Might I ask how you ran into the issue
There were a couple of boards which were unstable and kept crashing at
runtime, often when using GPU. Either the machine locked up completely
or there were rendering artifacts. Eventually also memtester triggered
on errors during walking ones test.
> and how you came up with the
> new numbers?
The hardware experts ran simulation of the bus in I think hyperlynx and
come up with new values for the RPA.
> Were the new register settings obtained by simply using a
> newver version of the NXP DDR tool or a new version of the RPA
> Spreadsheet used with the tool or some other means?
Nope, the RPA spreadsheet version was the same, it was the simulation
the hardware people ran which exposed the sub-optimal inputs into the RPA.
next prev parent reply other threads:[~2022-08-30 17:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 12:34 [PATCH] ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing Marek Vasut
2022-08-30 12:40 ` Fabio Estevam
2022-08-30 16:01 ` Tim Harvey
2022-08-30 17:40 ` Marek Vasut [this message]
2022-09-18 20:41 ` sbabic
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