From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michal Simek Date: Fri, 29 Aug 2014 13:50:25 +0200 Subject: [U-Boot] [PATCH 0/8] U-Boot port to Xtensa architecture In-Reply-To: <1408556533-22433-1-git-send-email-jcmvbkbc@gmail.com> References: <1408556533-22433-1-git-send-email-jcmvbkbc@gmail.com> Message-ID: <54006901.4060805@monstr.eu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Max, On 08/20/2014 07:42 PM, Max Filippov wrote: > Hi Tom, > > this series adds U-Boot port to Xtensa, configurable processor architecture > from Tensilica, Inc., now Cadence Design Systems Inc. > > Preparation patches clean up OpenCores 10/100 MBit driver, enable it to be > used with dedicated packet memory and with gigabit PHY. Two patches add > proper xtensa bits: changes to shares files and contents of arch/xtensa. > One more patch adds sample xtensa CPU configuration -- Diamond 232. > One more patch adds xtfpga board family that consists of Avnet LX60, LX110 > and LX200 and Xilinx ML605 and KC705 FPGA boards configured with xtensa > bitstream. Any link to bitstreams? I have ml605 and kc705 here and will be nice to test it. Thanks, Michal -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 198 bytes Desc: OpenPGP digital signature URL: