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From: "Jan Beulich" <JBeulich@suse.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: tim@xen.org, kevin.tian@intel.com, keir@xen.org,
	suravee.suthikulpanit@amd.com, andrew.cooper3@citrix.com,
	eddie.dong@intel.com, xen-devel@lists.xen.org,
	Aravind.Gopalakrishnan@amd.com, jun.nakajima@intel.com
Subject: Re: [PATCH v10 15/20] x86/VPMU: Handle PMU interrupts for PV guests
Date: Wed, 10 Sep 2014 16:30:26 +0100	[thread overview]
Message-ID: <54108AB202000078000336A5@mail.emea.novell.com> (raw)
In-Reply-To: <1409802080-6160-16-git-send-email-boris.ostrovsky@oracle.com>

>>> On 04.09.14 at 05:41, <boris.ostrovsky@oracle.com> wrote:
>  int vpmu_do_interrupt(struct cpu_user_regs *regs)
>  {
> -    struct vcpu *v = current;
> -    struct vpmu_struct *vpmu = vcpu_vpmu(v);
> +    struct vcpu *sampled = current, *sampling;
> +    struct vpmu_struct *vpmu;
> +
> +    /* dom0 will handle interrupt for special domains (e.g. idle domain) */
> +    if ( sampled->domain->domain_id >= DOMID_FIRST_RESERVED )
> +    {
> +        sampling = choose_hwdom_vcpu();
> +        if ( !sampling )
> +            return 0;
> +    }
> +    else
> +        sampling = sampled;
> +
> +    vpmu = vcpu_vpmu(sampling);
> +    if ( !is_hvm_domain(sampling->domain) )
> +    {
> +        /* PV(H) guest or dom0 is doing system profiling */
> +        const struct cpu_user_regs *gregs;
> +
> +        if ( !vpmu->xenpmu_data )
> +            return 0;
> +
> +        if ( vpmu->xenpmu_data->pmu_flags & PMU_CACHED )
> +            return 1;
> +
> +        if ( is_pvh_domain(sampled->domain) &&
> +             !vpmu->arch_vpmu_ops->do_interrupt(regs) )
> +            return 0;
> +
> +        /* PV guest will be reading PMU MSRs from xenpmu_data */
> +        vpmu_set(vpmu, VPMU_CONTEXT_SAVE | VPMU_CONTEXT_LOADED);
> +        vpmu->arch_vpmu_ops->arch_vpmu_save(sampling);
> +        vpmu_reset(vpmu, VPMU_CONTEXT_SAVE | VPMU_CONTEXT_LOADED);
> +
> +        /* Store appropriate registers in xenpmu_data */
> +        if ( is_pv_32bit_domain(sampled->domain) )
> +        {
> +            /*
> +             * 32-bit dom0 cannot process Xen's addresses (which are 64 bit)
> +             * and therefore we treat it the same way as a non-priviledged
> +             * PV 32-bit domain.
> +             */
> +            struct compat_cpu_user_regs *cmp;
> +
> +            gregs = guest_cpu_user_regs();
> +
> +            cmp = (void *)&vpmu->xenpmu_data->pmu.r.regs;
> +            XLAT_cpu_user_regs(cmp, gregs);
> +        }
> +        else if ( !is_hardware_domain(sampled->domain) &&
> +                  !is_idle_vcpu(sampled) )
> +        {
> +            /* PV(H) guest */
> +            gregs = guest_cpu_user_regs();
> +            vpmu->xenpmu_data->pmu.r.regs = *gregs;
> +        }
> +        else
> +            vpmu->xenpmu_data->pmu.r.regs = *regs;
> +
> +        vpmu->xenpmu_data->domain_id = sampled->domain->domain_id;
> +        vpmu->xenpmu_data->vcpu_id = sampled->vcpu_id;
> +        vpmu->xenpmu_data->pcpu_id = smp_processor_id();
> +
> +        vpmu->xenpmu_data->pmu_flags |= PMU_CACHED;
> +        apic_write(APIC_LVTPC, vpmu->hw_lapic_lvtpc | APIC_LVT_MASKED);
> +        vpmu->hw_lapic_lvtpc |= APIC_LVT_MASKED;

Would it be wrong to do the |= first and thus avoiding to do the
same operation twice?

> @@ -230,7 +353,9 @@ void vpmu_load(struct vcpu *v)
>      local_irq_enable();
>  
>      /* Only when PMU is counting, we load PMU context immediately. */
> -    if ( !vpmu_is_set(vpmu, VPMU_RUNNING) )
> +    if ( !vpmu_is_set(vpmu, VPMU_RUNNING) ||
> +         (!is_hvm_domain(v->domain) &&
> +          vpmu->xenpmu_data->pmu_flags & PMU_CACHED) )

Please parenthesize & within &&.

Jan

  reply	other threads:[~2014-09-10 15:30 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-04  3:41 [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 01/20] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 02/20] x86/VPMU: Manage VPMU_CONTEXT_SAVE flag in vpmu_save_force() Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 03/20] x86/VPMU: Set MSR bitmaps only for HVM/PVH guests Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 04/20] x86/VPMU: Make vpmu macros a bit more efficient Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 05/20] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 06/20] vmx: Merge MSR management routines Boris Ostrovsky
2014-09-08 16:07   ` Jan Beulich
2014-09-08 17:28     ` Boris Ostrovsky
2014-09-09  9:11       ` Jan Beulich
2014-09-04  3:41 ` [PATCH v10 07/20] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 08/20] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 09/20] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-09-10 14:45   ` Jan Beulich
2014-09-10 17:23     ` Boris Ostrovsky
2014-09-11  6:39       ` Jan Beulich
2014-09-11 13:54         ` Boris Ostrovsky
2014-09-11 14:55           ` Jan Beulich
2014-09-11 15:26             ` Boris Ostrovsky
2014-09-11 15:59               ` Jan Beulich
2014-09-11 16:51                 ` Boris Ostrovsky
2014-09-12  6:50                   ` Jan Beulich
2014-09-12 14:21                     ` Boris Ostrovsky
2014-09-12 14:38                       ` Jan Beulich
2014-09-12 15:18                         ` Boris Ostrovsky
2014-09-15 11:56                           ` Konrad Rzeszutek Wilk
2014-09-15 13:06                             ` Jan Beulich
2014-09-16  1:00                               ` Boris Ostrovsky
2014-09-16  0:49                             ` Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 10/20] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 11/20] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-09-10 15:05   ` Jan Beulich
2014-09-10 17:37     ` Boris Ostrovsky
2014-09-11  6:44       ` Jan Beulich
2014-09-11 14:12         ` Boris Ostrovsky
2014-09-11 14:59           ` Jan Beulich
2014-09-11 16:10             ` Boris Ostrovsky
2014-09-12  6:49               ` Jan Beulich
2014-09-12 14:12                 ` Boris Ostrovsky
2014-09-12 14:39                   ` Jan Beulich
2014-09-12 15:03                     ` Boris Ostrovsky
2014-09-12 15:30                       ` Jan Beulich
2014-09-12 15:54                         ` Boris Ostrovsky
2014-09-12 16:05                           ` Jan Beulich
2014-09-12 11:41   ` Dietmar Hahn
2014-09-12 14:25     ` Boris Ostrovsky
2014-09-15 13:35       ` Dietmar Hahn
2014-09-18  4:11   ` Tian, Kevin
2014-09-18 21:50     ` Boris Ostrovsky
2014-09-19  6:51       ` Jan Beulich
2014-09-19 12:42         ` Boris Ostrovsky
2014-09-19 13:28           ` Jan Beulich
2014-09-22 22:29             ` Tian, Kevin
2014-09-22 22:32       ` Tian, Kevin
2014-09-22 22:48         ` Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 12/20] x86/VPMU: Initialize PMU for PV(H) guests Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 13/20] x86/VPMU: When handling MSR accesses, leave fault injection to callers Boris Ostrovsky
2014-09-18  5:01   ` Tian, Kevin
2014-09-04  3:41 ` [PATCH v10 14/20] x86/VPMU: Add support for PMU register handling on PV guests Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 15/20] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-09-10 15:30   ` Jan Beulich [this message]
2014-09-04  3:41 ` [PATCH v10 16/20] x86/VPMU: Merge vpmu_rdmsr and vpmu_wrmsr Boris Ostrovsky
2014-09-10 15:33   ` Jan Beulich
2014-09-18  4:16   ` Tian, Kevin
2014-09-04  3:41 ` [PATCH v10 17/20] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-09-10 15:39   ` Jan Beulich
2014-09-04  3:41 ` [PATCH v10 18/20] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-09-10 15:44   ` Jan Beulich
2014-09-04  3:41 ` [PATCH v10 19/20] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-09-04  3:41 ` [PATCH v10 20/20] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-09-10 15:48   ` Jan Beulich
2014-09-10 15:54 ` [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Jan Beulich

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