From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Harrison Subject: Re: [RFC 00/44] GPU scheduler for i915 driver Date: Mon, 20 Oct 2014 11:31:44 +0100 Message-ID: <5444E490.5080101@Intel.com> References: <1403803475-16337-1-git-send-email-John.C.Harrison@Intel.com> <1412937310.6905.1.camel@snewbury.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 8F25F89548 for ; Mon, 20 Oct 2014 03:31:46 -0700 (PDT) In-Reply-To: <1412937310.6905.1.camel@snewbury.org.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Steven Newbury Cc: Intel-GFX@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On 10/10/2014 11:35, Steven Newbury wrote: > On Thu, 2014-06-26 at 18:23 +0100, John.C.Harrison@Intel.com wrote: >> From: John Harrison Harrison@Intel.com> >> >> Implemented a batch buffer submission scheduler for the i915 DRM >> driver. > Hi John, > > I was just wondering what's happening with this patch series? Are you > still working on it? Does it need any testing? It is still in progress. Although currently stalled because it was decided to first replace the driver's seqno usage with request structures wherever possible. The theory being that this is safer and more sensible that having the scheduler cause out-of-order seqnos and the various work-arounds to cope with that.