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* [PATCH 0/3] dpaa2: support for crypto adapter
@ 2018-09-14 11:48 akhil.goyal
  2018-09-14 11:48 ` [PATCH 1/3] crypto/dpaa2_sec: support for event " akhil.goyal
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: akhil.goyal @ 2018-09-14 11:48 UTC (permalink / raw)
  To: dev; +Cc: hemant.agrawal, pablo.de.lara.guarch, Akhil Goyal

From: Akhil Goyal <akhil.goyal@nxp.com>

This patchset add support for event crypto adapter on dpaa2_sec
support for parallel and atomic queues are added.

The patches are rebased over 
http://patches.dpdk.org/user/todo/dpdk/?series=1101



Akhil Goyal (2):
  crypto/dpaa2_sec: support for event crypto adapter
  event/dpaa2: support for crypto adapter

Ashish Jain (1):
  crypto/dpaa2_sec: support for atomic queues

 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c   | 145 ++++++++++++++++-
 drivers/crypto/dpaa2_sec/dpaa2_sec_event.h    |  18 +++
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h     |   2 +
 .../dpaa2_sec/rte_pmd_dpaa2_sec_version.map   |   8 +
 drivers/event/dpaa2/Makefile                  |   3 +-
 drivers/event/dpaa2/dpaa2_eventdev.c          | 150 ++++++++++++++++++
 drivers/event/dpaa2/dpaa2_eventdev.h          |   9 ++
 drivers/event/dpaa2/meson.build               |   3 +-
 8 files changed, 330 insertions(+), 8 deletions(-)
 create mode 100644 drivers/crypto/dpaa2_sec/dpaa2_sec_event.h

-- 
2.17.1

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/3] crypto/dpaa2_sec: support for event crypto adapter
  2018-09-14 11:48 [PATCH 0/3] dpaa2: support for crypto adapter akhil.goyal
@ 2018-09-14 11:48 ` akhil.goyal
  2018-09-14 11:48 ` [PATCH 2/3] crypto/dpaa2_sec: support for atomic queues akhil.goyal
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: akhil.goyal @ 2018-09-14 11:48 UTC (permalink / raw)
  To: dev; +Cc: hemant.agrawal, pablo.de.lara.guarch, Akhil Goyal

From: Akhil Goyal <akhil.goyal@nxp.com>

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c   | 90 ++++++++++++++++++-
 drivers/crypto/dpaa2_sec/dpaa2_sec_event.h    | 18 ++++
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h     |  2 +
 .../dpaa2_sec/rte_pmd_dpaa2_sec_version.map   |  8 ++
 4 files changed, 116 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/dpaa2_sec/dpaa2_sec_event.h

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 53e493457..ae38f507b 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016 NXP
+ *   Copyright 2016-2018 NXP
  *
  */
 
@@ -10,7 +10,6 @@
 
 #include <rte_mbuf.h>
 #include <rte_cryptodev.h>
-#include <rte_security_driver.h>
 #include <rte_malloc.h>
 #include <rte_memcpy.h>
 #include <rte_string_fns.h>
@@ -28,6 +27,7 @@
 #include <fsl_mc_sys.h>
 
 #include "dpaa2_sec_priv.h"
+#include "dpaa2_sec_event.h"
 #include "dpaa2_sec_logs.h"
 
 /* Required types */
@@ -2853,6 +2853,92 @@ void dpaa2_sec_stats_reset(struct rte_cryptodev *dev)
 	}
 }
 
+static void __attribute__((hot))
+dpaa2_sec_process_parallel_event(struct qbman_swp *swp,
+				 const struct qbman_fd *fd,
+				 const struct qbman_result *dq,
+				 struct dpaa2_queue *rxq,
+				 struct rte_event *ev)
+{
+	/* Prefetching mbuf */
+	rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-
+		rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size));
+
+	/* Prefetching ipsec crypto_op stored in priv data of mbuf */
+	rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-64));
+
+	ev->flow_id = rxq->ev.flow_id;
+	ev->sub_event_type = rxq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = rxq->ev.sched_type;
+	ev->queue_id = rxq->ev.queue_id;
+	ev->priority = rxq->ev.priority;
+	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
+				(rxq->dev))->driver_id);
+
+	qbman_swp_dqrr_consume(swp, dq);
+}
+
+int
+dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t dpcon_id,
+		const struct rte_event *event)
+{
+	struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
+	struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
+	struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id];
+	struct dpseci_rx_queue_cfg cfg;
+	int ret;
+
+	if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
+		qp->rx_vq.cb = dpaa2_sec_process_parallel_event;
+	else
+		return -EINVAL;
+
+	memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
+	cfg.options = DPSECI_QUEUE_OPT_DEST;
+	cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON;
+	cfg.dest_cfg.dest_id = dpcon_id;
+	cfg.dest_cfg.priority = event->priority;
+
+	cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
+	cfg.user_ctx = (size_t)(qp);
+
+	ret = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
+				  qp_id, &cfg);
+	if (ret) {
+		RTE_LOG(ERR, PMD, "Error in dpseci_set_queue: ret: %d\n", ret);
+		return ret;
+	}
+
+	memcpy(&qp->rx_vq.ev, event, sizeof(struct rte_event));
+
+	return 0;
+}
+
+int
+dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
+			int qp_id)
+{
+	struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
+	struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
+	struct dpseci_rx_queue_cfg cfg;
+	int ret;
+
+	memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
+	cfg.options = DPSECI_QUEUE_OPT_DEST;
+	cfg.dest_cfg.dest_type = DPSECI_DEST_NONE;
+
+	ret = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
+				  qp_id, &cfg);
+	if (ret)
+		RTE_LOG(ERR, PMD, "Error in dpseci_set_queue: ret: %d\n", ret);
+
+	return ret;
+}
+
 static struct rte_cryptodev_ops crypto_ops = {
 	.dev_configure	      = dpaa2_sec_dev_configure,
 	.dev_start	      = dpaa2_sec_dev_start,
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
new file mode 100644
index 000000000..977099429
--- /dev/null
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018 NXP
+ *
+ */
+
+#ifndef _DPAA2_SEC_EVENT_H_
+#define _DPAA2_SEC_EVENT_H_
+
+int
+dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t dpcon_id,
+		const struct rte_event *event);
+
+int dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
+		int qp_id);
+
+#endif /* _DPAA2_SEC_EVENT_H_ */
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index d015be1e9..bce9633c0 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -8,6 +8,8 @@
 #ifndef _RTE_DPAA2_SEC_PMD_PRIVATE_H_
 #define _RTE_DPAA2_SEC_PMD_PRIVATE_H_
 
+#include <rte_security_driver.h>
+
 #define CRYPTODEV_NAME_DPAA2_SEC_PMD	crypto_dpaa2_sec
 /**< NXP DPAA2 - SEC PMD device name */
 
diff --git a/drivers/crypto/dpaa2_sec/rte_pmd_dpaa2_sec_version.map b/drivers/crypto/dpaa2_sec/rte_pmd_dpaa2_sec_version.map
index 8591cc0b1..0bfb986d0 100644
--- a/drivers/crypto/dpaa2_sec/rte_pmd_dpaa2_sec_version.map
+++ b/drivers/crypto/dpaa2_sec/rte_pmd_dpaa2_sec_version.map
@@ -2,3 +2,11 @@ DPDK_17.05 {
 
 	local: *;
 };
+
+DPDK_18.11 {
+	global:
+
+	dpaa2_sec_eventq_attach;
+	dpaa2_sec_eventq_detach;
+
+} DPDK_17.05;
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/3] crypto/dpaa2_sec: support for atomic queues
  2018-09-14 11:48 [PATCH 0/3] dpaa2: support for crypto adapter akhil.goyal
  2018-09-14 11:48 ` [PATCH 1/3] crypto/dpaa2_sec: support for event " akhil.goyal
@ 2018-09-14 11:48 ` akhil.goyal
  2018-09-14 11:48 ` [PATCH 3/3] event/dpaa2: support for crypto adapter akhil.goyal
  2018-10-09 13:22 ` [PATCH 0/3] dpaa2: " Akhil Goyal
  3 siblings, 0 replies; 7+ messages in thread
From: akhil.goyal @ 2018-09-14 11:48 UTC (permalink / raw)
  To: dev; +Cc: hemant.agrawal, pablo.de.lara.guarch, Ashish Jain

From: Ashish Jain <ashish.jain@nxp.com>

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 57 +++++++++++++++++++--
 1 file changed, 52 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index ae38f507b..781595b38 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1209,6 +1209,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 	struct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;
 	struct qbman_swp *swp;
 	uint16_t num_tx = 0;
+	uint32_t flags[MAX_TX_RING_SLOTS] = {0};
 	/*todo - need to support multiple buffer pools */
 	uint16_t bpid;
 	struct rte_mempool *mb_pool;
@@ -1240,6 +1241,15 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 			dpaa2_eqcr_size : nb_ops;
 
 		for (loop = 0; loop < frames_to_send; loop++) {
+			if ((*ops)->sym->m_src->seqn) {
+			 uint8_t dqrr_index = (*ops)->sym->m_src->seqn - 1;
+
+			 flags[loop] = QBMAN_ENQUEUE_FLAG_DCA | dqrr_index;
+			 DPAA2_PER_LCORE_DQRR_SIZE--;
+			 DPAA2_PER_LCORE_DQRR_HELD &= ~(1 << dqrr_index);
+			 (*ops)->sym->m_src->seqn = DPAA2_INVALID_MBUF_SEQN;
+			}
+
 			/*Clear the unused FD fields before sending*/
 			memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 			mb_pool = (*ops)->sym->m_src->pool;
@@ -1256,7 +1266,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 		while (loop < frames_to_send) {
 			loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
 							&fd_arr[loop],
-							NULL,
+							&flags[loop],
 							frames_to_send - loop);
 		}
 
@@ -1281,6 +1291,9 @@ sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
 		DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
 		rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
 
+	diff = len - mbuf->pkt_len;
+	mbuf->pkt_len += diff;
+	mbuf->data_len += diff;
 	op = (struct rte_crypto_op *)(size_t)mbuf->buf_iova;
 	mbuf->buf_iova = op->sym->aead.digest.phys_addr;
 	op->sym->aead.digest.phys_addr = 0L;
@@ -1291,9 +1304,6 @@ sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)
 		mbuf->data_off += SEC_FLC_DHR_OUTBOUND;
 	else
 		mbuf->data_off += SEC_FLC_DHR_INBOUND;
-	diff = len - mbuf->pkt_len;
-	mbuf->pkt_len += diff;
-	mbuf->data_len += diff;
 
 	return op;
 }
@@ -2879,6 +2889,38 @@ dpaa2_sec_process_parallel_event(struct qbman_swp *swp,
 
 	qbman_swp_dqrr_consume(swp, dq);
 }
+static void
+dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
+				 const struct qbman_fd *fd,
+				 const struct qbman_result *dq,
+				 struct dpaa2_queue *rxq,
+				 struct rte_event *ev)
+{
+	uint8_t dqrr_index;
+	struct rte_crypto_op *crypto_op = (struct rte_crypto_op *)ev->event_ptr;
+	/* Prefetching mbuf */
+	rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-
+		rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size));
+
+	/* Prefetching ipsec crypto_op stored in priv data of mbuf */
+	rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(fd)-64));
+
+	ev->flow_id = rxq->ev.flow_id;
+	ev->sub_event_type = rxq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = rxq->ev.sched_type;
+	ev->queue_id = rxq->ev.queue_id;
+	ev->priority = rxq->ev.priority;
+
+	ev->event_ptr = sec_fd_to_mbuf(fd, ((struct rte_cryptodev *)
+				(rxq->dev))->driver_id);
+	dqrr_index = qbman_get_dqrr_idx(dq);
+	crypto_op->sym->m_src->seqn = dqrr_index + 1;
+	DPAA2_PER_LCORE_DQRR_SIZE++;
+	DPAA2_PER_LCORE_DQRR_HELD |= 1 << dqrr_index;
+	DPAA2_PER_LCORE_DQRR_MBUF(dqrr_index) = crypto_op->sym->m_src;
+}
 
 int
 dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
@@ -2894,6 +2936,8 @@ dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
 
 	if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
 		qp->rx_vq.cb = dpaa2_sec_process_parallel_event;
+	else if (event->sched_type == RTE_SCHED_TYPE_ATOMIC)
+		qp->rx_vq.cb = dpaa2_sec_process_atomic_event;
 	else
 		return -EINVAL;
 
@@ -2905,7 +2949,10 @@ dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
 
 	cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
 	cfg.user_ctx = (size_t)(qp);
-
+	if (event->sched_type == RTE_SCHED_TYPE_ATOMIC) {
+		cfg.options |= DPSECI_QUEUE_OPT_ORDER_PRESERVATION;
+		cfg.order_preservation_en = 1;
+	}
 	ret = dpseci_set_rx_queue(dpseci, CMD_PRI_LOW, priv->token,
 				  qp_id, &cfg);
 	if (ret) {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 3/3] event/dpaa2: support for crypto adapter
  2018-09-14 11:48 [PATCH 0/3] dpaa2: support for crypto adapter akhil.goyal
  2018-09-14 11:48 ` [PATCH 1/3] crypto/dpaa2_sec: support for event " akhil.goyal
  2018-09-14 11:48 ` [PATCH 2/3] crypto/dpaa2_sec: support for atomic queues akhil.goyal
@ 2018-09-14 11:48 ` akhil.goyal
  2018-09-25  3:11   ` Jerin Jacob
  2018-10-09 13:22 ` [PATCH 0/3] dpaa2: " Akhil Goyal
  3 siblings, 1 reply; 7+ messages in thread
From: akhil.goyal @ 2018-09-14 11:48 UTC (permalink / raw)
  To: dev; +Cc: hemant.agrawal, pablo.de.lara.guarch, Akhil Goyal

From: Akhil Goyal <akhil.goyal@nxp.com>

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/event/dpaa2/Makefile         |   3 +-
 drivers/event/dpaa2/dpaa2_eventdev.c | 150 +++++++++++++++++++++++++++
 drivers/event/dpaa2/dpaa2_eventdev.h |   9 ++
 drivers/event/dpaa2/meson.build      |   3 +-
 4 files changed, 163 insertions(+), 2 deletions(-)

diff --git a/drivers/event/dpaa2/Makefile b/drivers/event/dpaa2/Makefile
index 5e1a63200..46f7d061e 100644
--- a/drivers/event/dpaa2/Makefile
+++ b/drivers/event/dpaa2/Makefile
@@ -20,9 +20,10 @@ CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2
 CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
 LDLIBS += -lrte_eal -lrte_eventdev
 LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2
-LDLIBS += -lrte_bus_vdev
+LDLIBS += -lrte_bus_vdev -lrte_pmd_dpaa2_sec
 CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
 CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
+CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec
 
 # versioning export map
 EXPORT_MAP := rte_pmd_dpaa2_event_version.map
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
index cadbdb13b..890ab461c 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -27,6 +27,7 @@
 #include <rte_pci.h>
 #include <rte_bus_vdev.h>
 #include <rte_ethdev_driver.h>
+#include <rte_cryptodev.h>
 #include <rte_event_eth_rx_adapter.h>
 
 #include <fslmc_vfio.h>
@@ -34,6 +35,7 @@
 #include <dpaa2_hw_mempool.h>
 #include <dpaa2_hw_dpio.h>
 #include <dpaa2_ethdev.h>
+#include <dpaa2_sec_event.h>
 #include "dpaa2_eventdev.h"
 #include "dpaa2_eventdev_logs.h"
 #include <portal/dpaa2_hw_pvt.h>
@@ -793,6 +795,149 @@ dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
 	return 0;
 }
 
+static int
+dpaa2_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
+			    const struct rte_cryptodev *cdev,
+			    uint32_t *caps)
+{
+	const char *name = cdev->data->name;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	if (!strncmp(name, "dpsec-", 6))
+		*caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP;
+	else
+		return -1;
+
+	return 0;
+}
+
+static int
+dpaa2_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		const struct rte_event *ev)
+{
+	struct dpaa2_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
+		ret = dpaa2_sec_eventq_attach(cryptodev, i,
+				dpcon_id, ev);
+		if (ret) {
+			DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach failed: ret %d\n",
+				    ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	for (i = (i - 1); i >= 0 ; i--)
+		dpaa2_sec_eventq_detach(cryptodev, i);
+
+	return ret;
+}
+
+static int
+dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		int32_t rx_queue_id,
+		const struct rte_event *ev)
+{
+	struct dpaa2_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa2_eventdev_crypto_queue_add_all(dev,
+				cryptodev, ev);
+
+	ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
+			dpcon_id, ev);
+	if (ret) {
+		DPAA2_EVENTDEV_ERR(
+			"dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int
+dpaa2_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cdev)
+{
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
+		ret = dpaa2_sec_eventq_detach(cdev, i);
+		if (ret) {
+			DPAA2_EVENTDEV_ERR(
+				"dpaa2_sec_eventq_detach failed:ret %d\n", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int
+dpaa2_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cryptodev,
+			     int32_t rx_queue_id)
+{
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa2_eventdev_crypto_queue_del_all(dev, cryptodev);
+
+	ret = dpaa2_sec_eventq_detach(cryptodev, rx_queue_id);
+	if (ret) {
+		DPAA2_EVENTDEV_ERR(
+			"dpaa2_sec_eventq_detach failed: ret: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int
+dpaa2_eventdev_crypto_start(const struct rte_eventdev *dev,
+			    const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
+static int
+dpaa2_eventdev_crypto_stop(const struct rte_eventdev *dev,
+			   const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
 static struct rte_eventdev_ops dpaa2_eventdev_ops = {
 	.dev_infos_get    = dpaa2_eventdev_info_get,
 	.dev_configure    = dpaa2_eventdev_configure,
@@ -814,6 +959,11 @@ static struct rte_eventdev_ops dpaa2_eventdev_ops = {
 	.eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
 	.eth_rx_adapter_start = dpaa2_eventdev_eth_start,
 	.eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
+	.crypto_adapter_caps_get	= dpaa2_eventdev_crypto_caps_get,
+	.crypto_adapter_queue_pair_add	= dpaa2_eventdev_crypto_queue_add,
+	.crypto_adapter_queue_pair_del	= dpaa2_eventdev_crypto_queue_del,
+	.crypto_adapter_start		= dpaa2_eventdev_crypto_start,
+	.crypto_adapter_stop		= dpaa2_eventdev_crypto_stop,
 };
 
 static int
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h b/drivers/event/dpaa2/dpaa2_eventdev.h
index 720e0c63b..c847b3eab 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.h
+++ b/drivers/event/dpaa2/dpaa2_eventdev.h
@@ -42,6 +42,15 @@ enum {
 		(RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
+
+/**< Crypto Rx adapter cap to return If the packet transfers from
+ * the cryptodev to eventdev with DPAA2 devices.
+ */
+#define RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP \
+		(RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
+
 /**< Ethernet Rx adapter cap to return If the packet transfers from
  * the ethdev to eventdev with DPAA2 devices.
  */
diff --git a/drivers/event/dpaa2/meson.build b/drivers/event/dpaa2/meson.build
index de7a46155..c1bd63384 100644
--- a/drivers/event/dpaa2/meson.build
+++ b/drivers/event/dpaa2/meson.build
@@ -4,8 +4,9 @@
 if host_machine.system() != 'linux'
 	build = false
 endif
-deps += ['bus_vdev', 'pmd_dpaa2']
+deps += ['bus_vdev', 'pmd_dpaa2', 'pmd_dpaa2_sec']
 sources = files('dpaa2_hw_dpcon.c',
 		'dpaa2_eventdev.c')
 
 allow_experimental_apis = true
+includes += include_directories('../../crypto/dpaa2_sec/')
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH 3/3] event/dpaa2: support for crypto adapter
  2018-09-14 11:48 ` [PATCH 3/3] event/dpaa2: support for crypto adapter akhil.goyal
@ 2018-09-25  3:11   ` Jerin Jacob
  2018-10-02  9:49     ` Gujjar, Abhinandan S
  0 siblings, 1 reply; 7+ messages in thread
From: Jerin Jacob @ 2018-09-25  3:11 UTC (permalink / raw)
  To: akhil.goyal; +Cc: dev, hemant.agrawal, pablo.de.lara.guarch, abhinandan.gujjar

-----Original Message-----
> Date: Fri, 14 Sep 2018 17:18:10 +0530
> From: akhil.goyal@nxp.com
> To: dev@dpdk.org
> CC: hemant.agrawal@nxp.com, pablo.de.lara.guarch@intel.com, Akhil Goyal
>  <akhil.goyal@nxp.com>
> Subject: [dpdk-dev] [PATCH 3/3] event/dpaa2: support for crypto adapter
> X-Mailer: git-send-email 2.17.1
> 
> 
> From: Akhil Goyal <akhil.goyal@nxp.com>
> 
> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>


Adding Eventdev Crypto Adapter maintainer

+ Abhinandan Gujjar <abhinandan.gujjar@intel.com>


> ---
>  drivers/event/dpaa2/Makefile         |   3 +-
>  drivers/event/dpaa2/dpaa2_eventdev.c | 150 +++++++++++++++++++++++++++
>  drivers/event/dpaa2/dpaa2_eventdev.h |   9 ++
>  drivers/event/dpaa2/meson.build      |   3 +-
>  4 files changed, 163 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/event/dpaa2/Makefile b/drivers/event/dpaa2/Makefile
> index 5e1a63200..46f7d061e 100644
> --- a/drivers/event/dpaa2/Makefile
> +++ b/drivers/event/dpaa2/Makefile
> @@ -20,9 +20,10 @@ CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2
>  CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
>  LDLIBS += -lrte_eal -lrte_eventdev
>  LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2
> -LDLIBS += -lrte_bus_vdev
> +LDLIBS += -lrte_bus_vdev -lrte_pmd_dpaa2_sec
>  CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
>  CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
> +CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec
> 
>  # versioning export map
>  EXPORT_MAP := rte_pmd_dpaa2_event_version.map
> diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
> index cadbdb13b..890ab461c 100644
> --- a/drivers/event/dpaa2/dpaa2_eventdev.c
> +++ b/drivers/event/dpaa2/dpaa2_eventdev.c
> @@ -27,6 +27,7 @@
>  #include <rte_pci.h>
>  #include <rte_bus_vdev.h>
>  #include <rte_ethdev_driver.h>
> +#include <rte_cryptodev.h>
>  #include <rte_event_eth_rx_adapter.h>
> 
>  #include <fslmc_vfio.h>
> @@ -34,6 +35,7 @@
>  #include <dpaa2_hw_mempool.h>
>  #include <dpaa2_hw_dpio.h>
>  #include <dpaa2_ethdev.h>
> +#include <dpaa2_sec_event.h>
>  #include "dpaa2_eventdev.h"
>  #include "dpaa2_eventdev_logs.h"
>  #include <portal/dpaa2_hw_pvt.h>
> @@ -793,6 +795,149 @@ dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
>         return 0;
>  }
> 
> +static int
> +dpaa2_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
> +                           const struct rte_cryptodev *cdev,
> +                           uint32_t *caps)
> +{
> +       const char *name = cdev->data->name;
> +
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       RTE_SET_USED(dev);
> +
> +       if (!strncmp(name, "dpsec-", 6))
> +               *caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP;
> +       else
> +               return -1;
> +
> +       return 0;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
> +               const struct rte_cryptodev *cryptodev,
> +               const struct rte_event *ev)
> +{
> +       struct dpaa2_eventdev *priv = dev->data->dev_private;
> +       uint8_t ev_qid = ev->queue_id;
> +       uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> +       int i, ret;
> +
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
> +               ret = dpaa2_sec_eventq_attach(cryptodev, i,
> +                               dpcon_id, ev);
> +               if (ret) {
> +                       DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach failed: ret %d\n",
> +                                   ret);
> +                       goto fail;
> +               }
> +       }
> +       return 0;
> +fail:
> +       for (i = (i - 1); i >= 0 ; i--)
> +               dpaa2_sec_eventq_detach(cryptodev, i);
> +
> +       return ret;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
> +               const struct rte_cryptodev *cryptodev,
> +               int32_t rx_queue_id,
> +               const struct rte_event *ev)
> +{
> +       struct dpaa2_eventdev *priv = dev->data->dev_private;
> +       uint8_t ev_qid = ev->queue_id;
> +       uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> +       int ret;
> +
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       if (rx_queue_id == -1)
> +               return dpaa2_eventdev_crypto_queue_add_all(dev,
> +                               cryptodev, ev);
> +
> +       ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
> +                       dpcon_id, ev);
> +       if (ret) {
> +               DPAA2_EVENTDEV_ERR(
> +                       "dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
> +               return ret;
> +       }
> +       return 0;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
> +                            const struct rte_cryptodev *cdev)
> +{
> +       int i, ret;
> +
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       RTE_SET_USED(dev);
> +
> +       for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
> +               ret = dpaa2_sec_eventq_detach(cdev, i);
> +               if (ret) {
> +                       DPAA2_EVENTDEV_ERR(
> +                               "dpaa2_sec_eventq_detach failed:ret %d\n", ret);
> +                       return ret;
> +               }
> +       }
> +
> +       return 0;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
> +                            const struct rte_cryptodev *cryptodev,
> +                            int32_t rx_queue_id)
> +{
> +       int ret;
> +
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       if (rx_queue_id == -1)
> +               return dpaa2_eventdev_crypto_queue_del_all(dev, cryptodev);
> +
> +       ret = dpaa2_sec_eventq_detach(cryptodev, rx_queue_id);
> +       if (ret) {
> +               DPAA2_EVENTDEV_ERR(
> +                       "dpaa2_sec_eventq_detach failed: ret: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_start(const struct rte_eventdev *dev,
> +                           const struct rte_cryptodev *cryptodev)
> +{
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       RTE_SET_USED(dev);
> +       RTE_SET_USED(cryptodev);
> +
> +       return 0;
> +}
> +
> +static int
> +dpaa2_eventdev_crypto_stop(const struct rte_eventdev *dev,
> +                          const struct rte_cryptodev *cryptodev)
> +{
> +       EVENTDEV_INIT_FUNC_TRACE();
> +
> +       RTE_SET_USED(dev);
> +       RTE_SET_USED(cryptodev);
> +
> +       return 0;
> +}
> +
>  static struct rte_eventdev_ops dpaa2_eventdev_ops = {
>         .dev_infos_get    = dpaa2_eventdev_info_get,
>         .dev_configure    = dpaa2_eventdev_configure,
> @@ -814,6 +959,11 @@ static struct rte_eventdev_ops dpaa2_eventdev_ops = {
>         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
>         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
>         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
> +       .crypto_adapter_caps_get        = dpaa2_eventdev_crypto_caps_get,
> +       .crypto_adapter_queue_pair_add  = dpaa2_eventdev_crypto_queue_add,
> +       .crypto_adapter_queue_pair_del  = dpaa2_eventdev_crypto_queue_del,
> +       .crypto_adapter_start           = dpaa2_eventdev_crypto_start,
> +       .crypto_adapter_stop            = dpaa2_eventdev_crypto_stop,
>  };
> 
>  static int
> diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h b/drivers/event/dpaa2/dpaa2_eventdev.h
> index 720e0c63b..c847b3eab 100644
> --- a/drivers/event/dpaa2/dpaa2_eventdev.h
> +++ b/drivers/event/dpaa2/dpaa2_eventdev.h
> @@ -42,6 +42,15 @@ enum {
>                 (RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
>                 RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
>                 RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
> +
> +/**< Crypto Rx adapter cap to return If the packet transfers from
> + * the cryptodev to eventdev with DPAA2 devices.
> + */
> +#define RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP \
> +               (RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
> +               RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
> +               RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
> +
>  /**< Ethernet Rx adapter cap to return If the packet transfers from
>   * the ethdev to eventdev with DPAA2 devices.
>   */
> diff --git a/drivers/event/dpaa2/meson.build b/drivers/event/dpaa2/meson.build
> index de7a46155..c1bd63384 100644
> --- a/drivers/event/dpaa2/meson.build
> +++ b/drivers/event/dpaa2/meson.build
> @@ -4,8 +4,9 @@
>  if host_machine.system() != 'linux'
>         build = false
>  endif
> -deps += ['bus_vdev', 'pmd_dpaa2']
> +deps += ['bus_vdev', 'pmd_dpaa2', 'pmd_dpaa2_sec']
>  sources = files('dpaa2_hw_dpcon.c',
>                 'dpaa2_eventdev.c')
> 
>  allow_experimental_apis = true
> +includes += include_directories('../../crypto/dpaa2_sec/')
> --
> 2.17.1
> 

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 3/3] event/dpaa2: support for crypto adapter
  2018-09-25  3:11   ` Jerin Jacob
@ 2018-10-02  9:49     ` Gujjar, Abhinandan S
  0 siblings, 0 replies; 7+ messages in thread
From: Gujjar, Abhinandan S @ 2018-10-02  9:49 UTC (permalink / raw)
  To: Jerin Jacob, akhil.goyal; +Cc: dev, hemant.agrawal, De Lara Guarch, Pablo

Acked-By: Abhinandan Gujjar <abhinandan.gujjar@intel.com>


> -----Original Message-----
> From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> Sent: Tuesday, September 25, 2018 8:42 AM
> To: akhil.goyal@nxp.com
> Cc: dev@dpdk.org; hemant.agrawal@nxp.com; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>; Gujjar, Abhinandan S
> <abhinandan.gujjar@intel.com>
> Subject: Re: [dpdk-dev] [PATCH 3/3] event/dpaa2: support for crypto adapter
> 
> -----Original Message-----
> > Date: Fri, 14 Sep 2018 17:18:10 +0530
> > From: akhil.goyal@nxp.com
> > To: dev@dpdk.org
> > CC: hemant.agrawal@nxp.com, pablo.de.lara.guarch@intel.com, Akhil
> > Goyal  <akhil.goyal@nxp.com>
> > Subject: [dpdk-dev] [PATCH 3/3] event/dpaa2: support for crypto
> > adapter
> > X-Mailer: git-send-email 2.17.1
> >
> >
> > From: Akhil Goyal <akhil.goyal@nxp.com>
> >
> > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> > Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> 
> 
> Adding Eventdev Crypto Adapter maintainer
> 
> + Abhinandan Gujjar <abhinandan.gujjar@intel.com>
> 
> 
> > ---
> >  drivers/event/dpaa2/Makefile         |   3 +-
> >  drivers/event/dpaa2/dpaa2_eventdev.c | 150
> +++++++++++++++++++++++++++
> >  drivers/event/dpaa2/dpaa2_eventdev.h |   9 ++
> >  drivers/event/dpaa2/meson.build      |   3 +-
> >  4 files changed, 163 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/event/dpaa2/Makefile
> > b/drivers/event/dpaa2/Makefile index 5e1a63200..46f7d061e 100644
> > --- a/drivers/event/dpaa2/Makefile
> > +++ b/drivers/event/dpaa2/Makefile
> > @@ -20,9 +20,10 @@ CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2  CFLAGS
> > += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
> >  LDLIBS += -lrte_eal -lrte_eventdev
> >  LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2 -LDLIBS
> > += -lrte_bus_vdev
> > +LDLIBS += -lrte_bus_vdev -lrte_pmd_dpaa2_sec
> >  CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2  CFLAGS +=
> > -I$(RTE_SDK)/drivers/net/dpaa2/mc
> > +CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec
> >
> >  # versioning export map
> >  EXPORT_MAP := rte_pmd_dpaa2_event_version.map diff --git
> > a/drivers/event/dpaa2/dpaa2_eventdev.c
> > b/drivers/event/dpaa2/dpaa2_eventdev.c
> > index cadbdb13b..890ab461c 100644
> > --- a/drivers/event/dpaa2/dpaa2_eventdev.c
> > +++ b/drivers/event/dpaa2/dpaa2_eventdev.c
> > @@ -27,6 +27,7 @@
> >  #include <rte_pci.h>
> >  #include <rte_bus_vdev.h>
> >  #include <rte_ethdev_driver.h>
> > +#include <rte_cryptodev.h>
> >  #include <rte_event_eth_rx_adapter.h>
> >
> >  #include <fslmc_vfio.h>
> > @@ -34,6 +35,7 @@
> >  #include <dpaa2_hw_mempool.h>
> >  #include <dpaa2_hw_dpio.h>
> >  #include <dpaa2_ethdev.h>
> > +#include <dpaa2_sec_event.h>
> >  #include "dpaa2_eventdev.h"
> >  #include "dpaa2_eventdev_logs.h"
> >  #include <portal/dpaa2_hw_pvt.h>
> > @@ -793,6 +795,149 @@ dpaa2_eventdev_eth_stop(const struct
> rte_eventdev *dev,
> >         return 0;
> >  }
> >
> > +static int
> > +dpaa2_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
> > +                           const struct rte_cryptodev *cdev,
> > +                           uint32_t *caps) {
> > +       const char *name = cdev->data->name;
> > +
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       RTE_SET_USED(dev);
> > +
> > +       if (!strncmp(name, "dpsec-", 6))
> > +               *caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP;
> > +       else
> > +               return -1;
> > +
> > +       return 0;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
> > +               const struct rte_cryptodev *cryptodev,
> > +               const struct rte_event *ev) {
> > +       struct dpaa2_eventdev *priv = dev->data->dev_private;
> > +       uint8_t ev_qid = ev->queue_id;
> > +       uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > +       int i, ret;
> > +
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
> > +               ret = dpaa2_sec_eventq_attach(cryptodev, i,
> > +                               dpcon_id, ev);
> > +               if (ret) {
> > +                       DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach failed: ret
> %d\n",
> > +                                   ret);
> > +                       goto fail;
> > +               }
> > +       }
> > +       return 0;
> > +fail:
> > +       for (i = (i - 1); i >= 0 ; i--)
> > +               dpaa2_sec_eventq_detach(cryptodev, i);
> > +
> > +       return ret;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
> > +               const struct rte_cryptodev *cryptodev,
> > +               int32_t rx_queue_id,
> > +               const struct rte_event *ev) {
> > +       struct dpaa2_eventdev *priv = dev->data->dev_private;
> > +       uint8_t ev_qid = ev->queue_id;
> > +       uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > +       int ret;
> > +
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       if (rx_queue_id == -1)
> > +               return dpaa2_eventdev_crypto_queue_add_all(dev,
> > +                               cryptodev, ev);
> > +
> > +       ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
> > +                       dpcon_id, ev);
> > +       if (ret) {
> > +               DPAA2_EVENTDEV_ERR(
> > +                       "dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
> > +               return ret;
> > +       }
> > +       return 0;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
> > +                            const struct rte_cryptodev *cdev) {
> > +       int i, ret;
> > +
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       RTE_SET_USED(dev);
> > +
> > +       for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
> > +               ret = dpaa2_sec_eventq_detach(cdev, i);
> > +               if (ret) {
> > +                       DPAA2_EVENTDEV_ERR(
> > +                               "dpaa2_sec_eventq_detach failed:ret %d\n", ret);
> > +                       return ret;
> > +               }
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
> > +                            const struct rte_cryptodev *cryptodev,
> > +                            int32_t rx_queue_id) {
> > +       int ret;
> > +
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       if (rx_queue_id == -1)
> > +               return dpaa2_eventdev_crypto_queue_del_all(dev,
> > + cryptodev);
> > +
> > +       ret = dpaa2_sec_eventq_detach(cryptodev, rx_queue_id);
> > +       if (ret) {
> > +               DPAA2_EVENTDEV_ERR(
> > +                       "dpaa2_sec_eventq_detach failed: ret: %d\n", ret);
> > +               return ret;
> > +       }
> > +
> > +       return 0;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_start(const struct rte_eventdev *dev,
> > +                           const struct rte_cryptodev *cryptodev) {
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       RTE_SET_USED(dev);
> > +       RTE_SET_USED(cryptodev);
> > +
> > +       return 0;
> > +}
> > +
> > +static int
> > +dpaa2_eventdev_crypto_stop(const struct rte_eventdev *dev,
> > +                          const struct rte_cryptodev *cryptodev) {
> > +       EVENTDEV_INIT_FUNC_TRACE();
> > +
> > +       RTE_SET_USED(dev);
> > +       RTE_SET_USED(cryptodev);
> > +
> > +       return 0;
> > +}
> > +
> >  static struct rte_eventdev_ops dpaa2_eventdev_ops = {
> >         .dev_infos_get    = dpaa2_eventdev_info_get,
> >         .dev_configure    = dpaa2_eventdev_configure,
> > @@ -814,6 +959,11 @@ static struct rte_eventdev_ops dpaa2_eventdev_ops
> = {
> >         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
> >         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
> >         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
> > +       .crypto_adapter_caps_get        = dpaa2_eventdev_crypto_caps_get,
> > +       .crypto_adapter_queue_pair_add  = dpaa2_eventdev_crypto_queue_add,
> > +       .crypto_adapter_queue_pair_del  = dpaa2_eventdev_crypto_queue_del,
> > +       .crypto_adapter_start           = dpaa2_eventdev_crypto_start,
> > +       .crypto_adapter_stop            = dpaa2_eventdev_crypto_stop,
> >  };
> >
> >  static int
> > diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h
> > b/drivers/event/dpaa2/dpaa2_eventdev.h
> > index 720e0c63b..c847b3eab 100644
> > --- a/drivers/event/dpaa2/dpaa2_eventdev.h
> > +++ b/drivers/event/dpaa2/dpaa2_eventdev.h
> > @@ -42,6 +42,15 @@ enum {
> >                 (RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT | \
> >                 RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
> >                 RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
> > +
> > +/**< Crypto Rx adapter cap to return If the packet transfers from
> > + * the cryptodev to eventdev with DPAA2 devices.
> > + */
> > +#define RTE_EVENT_CRYPTO_ADAPTER_DPAA2_CAP \
> > +               (RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
> > +
> RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
> > +               RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
> > +
> >  /**< Ethernet Rx adapter cap to return If the packet transfers from
> >   * the ethdev to eventdev with DPAA2 devices.
> >   */
> > diff --git a/drivers/event/dpaa2/meson.build
> > b/drivers/event/dpaa2/meson.build index de7a46155..c1bd63384 100644
> > --- a/drivers/event/dpaa2/meson.build
> > +++ b/drivers/event/dpaa2/meson.build
> > @@ -4,8 +4,9 @@
> >  if host_machine.system() != 'linux'
> >         build = false
> >  endif
> > -deps += ['bus_vdev', 'pmd_dpaa2']
> > +deps += ['bus_vdev', 'pmd_dpaa2', 'pmd_dpaa2_sec']
> >  sources = files('dpaa2_hw_dpcon.c',
> >                 'dpaa2_eventdev.c')
> >
> >  allow_experimental_apis = true
> > +includes += include_directories('../../crypto/dpaa2_sec/')
> > --
> > 2.17.1
> >

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 0/3] dpaa2: support for crypto adapter
  2018-09-14 11:48 [PATCH 0/3] dpaa2: support for crypto adapter akhil.goyal
                   ` (2 preceding siblings ...)
  2018-09-14 11:48 ` [PATCH 3/3] event/dpaa2: support for crypto adapter akhil.goyal
@ 2018-10-09 13:22 ` Akhil Goyal
  3 siblings, 0 replies; 7+ messages in thread
From: Akhil Goyal @ 2018-10-09 13:22 UTC (permalink / raw)
  To: dev; +Cc: hemant.agrawal, pablo.de.lara.guarch, abhinandan.gujjar, Jerin Jacob



On 9/14/2018 5:18 PM, akhil.goyal@nxp.com wrote:
> From: Akhil Goyal <akhil.goyal@nxp.com>
>
> This patchset add support for event crypto adapter on dpaa2_sec
> support for parallel and atomic queues are added.
>
> The patches are rebased over
> http://patches.dpdk.org/user/todo/dpdk/?series=1101
>
>
>
> Akhil Goyal (2):
>    crypto/dpaa2_sec: support for event crypto adapter
>    event/dpaa2: support for crypto adapter
>
> Ashish Jain (1):
>    crypto/dpaa2_sec: support for atomic queues
>
>   drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c   | 145 ++++++++++++++++-
>   drivers/crypto/dpaa2_sec/dpaa2_sec_event.h    |  18 +++
>   drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h     |   2 +
>   .../dpaa2_sec/rte_pmd_dpaa2_sec_version.map   |   8 +
>   drivers/event/dpaa2/Makefile                  |   3 +-
>   drivers/event/dpaa2/dpaa2_eventdev.c          | 150 ++++++++++++++++++
>   drivers/event/dpaa2/dpaa2_eventdev.h          |   9 ++
>   drivers/event/dpaa2/meson.build               |   3 +-
>   8 files changed, 330 insertions(+), 8 deletions(-)
>   create mode 100644 drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
>

Applied to dpdk-next-crypto

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2018-10-09 13:22 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-09-14 11:48 [PATCH 0/3] dpaa2: support for crypto adapter akhil.goyal
2018-09-14 11:48 ` [PATCH 1/3] crypto/dpaa2_sec: support for event " akhil.goyal
2018-09-14 11:48 ` [PATCH 2/3] crypto/dpaa2_sec: support for atomic queues akhil.goyal
2018-09-14 11:48 ` [PATCH 3/3] event/dpaa2: support for crypto adapter akhil.goyal
2018-09-25  3:11   ` Jerin Jacob
2018-10-02  9:49     ` Gujjar, Abhinandan S
2018-10-09 13:22 ` [PATCH 0/3] dpaa2: " Akhil Goyal

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