From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Date: Fri, 27 Mar 2020 14:41:29 +0800 Subject: [PATCH 6/6] rockchip: rk3328: Add support for ROC-RK3328-CC board In-Reply-To: <20200327044130.8763-7-wens@kernel.org> References: <20200327044130.8763-1-wens@kernel.org> <20200327044130.8763-7-wens@kernel.org> Message-ID: <5485974b-e2d2-4434-053b-7749297ce062@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 2020/3/27 ??12:41, Chen-Yu Tsai wrote: > From: Chen-Yu Tsai > > The ROC-RK3328-CC from Firefly and Libre Computer Project is a credit > card size development board based on the Rockchip RK3328 SoC, with: > > - 1/2/4 GB DDR4 DRAM > - eMMC connector for optional module > - micro SD card slot > - 1 x USB 3.0 host port > - 2 x USB 2.0 host port > - 1 x USB 2.0 OTG port > - HDMI video output > - TRRS connector with audio and composite video output > - gigabit Ethernet > - consumer IR receiver > - debug UART pins > > The ROC-RK3328-CC has the enable pin of the SD card power switch tied > to GPIO_0_D6. This pin also has the function SDMMC0_PWREN, which is > muxed by default. SDMMC0_PWREN is an active high signal controlled by > the MMC controller, however the switch enable is active low, and > pulled low (enabled) by default to make things work on boot. > > As such, we need to mux away from SDMMC0_PWREN and use GPIO to enable > power to the card. The default GPIO state for the pin is pull-down and > input, which doesn't require extra configuration when paired with the > external pull-down and active low switch. > > Thus we make a custom target for this board and do the muxing in its > spl_board_init() function. > > The device tree file is synced from the Linux kernel next-20200324. > > Signed-off-by: Chen-Yu Tsai Reviewed-by: Kever Yang Thanks, - Kever > --- > arch/arm/dts/Makefile | 1 + > arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 17 ++ > arch/arm/dts/rk3328-roc-cc.dts | 354 ++++++++++++++++++++++++ > arch/arm/mach-rockchip/rk3328/Kconfig | 8 + > board/firefly/roc-cc-rk3328/Kconfig | 24 ++ > board/firefly/roc-cc-rk3328/MAINTAINERS | 7 + > board/firefly/roc-cc-rk3328/Makefile | 1 + > board/firefly/roc-cc-rk3328/board.c | 38 +++ > configs/roc-cc-rk3328_defconfig | 97 +++++++ > doc/README.rockchip | 4 +- > 10 files changed, 550 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3328-roc-cc.dts > create mode 100644 board/firefly/roc-cc-rk3328/Kconfig > create mode 100644 board/firefly/roc-cc-rk3328/MAINTAINERS > create mode 100644 board/firefly/roc-cc-rk3328/Makefile > create mode 100644 board/firefly/roc-cc-rk3328/board.c > create mode 100644 configs/roc-cc-rk3328_defconfig > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 9c593b2c986a..023cb010532d 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -104,6 +104,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ > > dtb-$(CONFIG_ROCKCHIP_RK3328) += \ > rk3328-evb.dtb \ > + rk3328-roc-cc.dtb \ > rk3328-rock64.dtb > > dtb-$(CONFIG_ROCKCHIP_RK3368) += \ > diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > new file mode 100644 > index 000000000000..15b67f8bbdf4 > --- /dev/null > +++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > @@ -0,0 +1,17 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd > + */ > + > +#include "rk3328-u-boot.dtsi" > +#include "rk3328-sdram-ddr4-666.dtsi" > +/ { > + chosen { > + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; > + }; > +}; > + > +&usb_host0_xhci { > + vbus-supply = <&vcc_host1_5v>; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts > new file mode 100644 > index 000000000000..8d553c92182a > --- /dev/null > +++ b/arch/arm/dts/rk3328-roc-cc.dts > @@ -0,0 +1,354 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd > + */ > + > +/dts-v1/; > +#include "rk3328.dtsi" > + > +/ { > + model = "Firefly roc-rk3328-cc"; > + compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + gmac_clkin: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "gmac_clkin"; > + #clock-cells = <0>; > + }; > + > + dc_12v: dc-12v { > + compatible = "regulator-fixed"; > + regulator-name = "dc_12v"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + vcc_sd: sdmmc-regulator { > + compatible = "regulator-fixed"; > + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0m1_gpio>; > + regulator-boot-on; > + regulator-name = "vcc_sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&vcc_io>; > + }; > + > + vcc_sdio: sdmmcio-regulator { > + compatible = "regulator-gpio"; > + gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>; > + states = <1800000 0x1 > + 3300000 0x0>; > + regulator-name = "vcc_sdio"; > + regulator-type = "voltage"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb20_host_drv>; > + regulator-name = "vcc_host1_5v"; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc_phy: vcc-phy-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_phy"; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + power { > + label = "firefly:blue:power"; > + linux,default-trigger = "heartbeat"; > + gpios = <&rk805 1 GPIO_ACTIVE_LOW>; > + default-state = "on"; > + mode = <0x23>; > + }; > + > + user { > + label = "firefly:yellow:user"; > + linux,default-trigger = "mmc1"; > + gpios = <&rk805 0 GPIO_ACTIVE_LOW>; > + default-state = "off"; > + mode = <0x05>; > + }; > + }; > +}; > + > +&cpu0 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu1 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu2 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&cpu3 { > + cpu-supply = <&vdd_arm>; > +}; > + > +&emmc { > + bus-width = <8>; > + cap-mmc-highspeed; > + max-frequency = <150000000>; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > + vmmc-supply = <&vcc_io>; > + vqmmc-supply = <&vcc18_emmc>; > + status = "okay"; > +}; > + > +&gmac2io { > + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; > + clock_in_out = "input"; > + phy-supply = <&vcc_phy>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmiim1_pins>; > + snps,aal; > + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + snps,rxpbl = <0x4>; > + snps,txpbl = <0x4>; > + tx_delay = <0x24>; > + rx_delay = <0x18>; > + status = "okay"; > +}; > + > +&hdmi { > + status = "okay"; > +}; > + > +&hdmiphy { > + status = "okay"; > +}; > + > +&i2c1 { > + status = "okay"; > + > + rk805: pmic at 18 { > + compatible = "rockchip,rk805"; > + reg = <0x18>; > + interrupt-parent = <&gpio1>; > + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + clock-output-names = "xin32k", "rk805-clkout2"; > + gpio-controller; > + #gpio-cells = <2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int_l>; > + rockchip,system-power-controller; > + wakeup-source; > + > + vcc1-supply = <&vcc_sys>; > + vcc2-supply = <&vcc_sys>; > + vcc3-supply = <&vcc_sys>; > + vcc4-supply = <&vcc_sys>; > + vcc5-supply = <&vcc_io>; > + vcc6-supply = <&vcc_io>; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-name = "vdd_logic"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1450000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1000000>; > + }; > + }; > + > + vdd_arm: DCDC_REG2 { > + regulator-name = "vdd_arm"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1450000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <950000>; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vcc_io: DCDC_REG4 { > + regulator-name = "vcc_io"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcc_18: LDO_REG1 { > + regulator-name = "vcc_18"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcc18_emmc: LDO_REG2 { > + regulator-name = "vcc18_emmc"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vdd_10: LDO_REG3 { > + regulator-name = "vdd_10"; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1000000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1000000>; > + }; > + }; > + }; > + }; > +}; > + > +&io_domains { > + status = "okay"; > + > + vccio1-supply = <&vcc_io>; > + vccio2-supply = <&vcc18_emmc>; > + vccio3-supply = <&vcc_sdio>; > + vccio4-supply = <&vcc_18>; > + vccio5-supply = <&vcc_io>; > + vccio6-supply = <&vcc_io>; > + pmuio-supply = <&vcc_io>; > +}; > + > +&pinctrl { > + pmic { > + pmic_int_l: pmic-int-l { > + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb2 { > + usb20_host_drv: usb20-host-drv { > + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&sdmmc { > + bus-width = <4>; > + cap-mmc-highspeed; > + cap-sd-highspeed; > + disable-wp; > + max-frequency = <150000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc_sd>; > + vqmmc-supply = <&vcc_sdio>; > + status = "okay"; > +}; > + > +&tsadc { > + status = "okay"; > +}; > + > +&u2phy { > + status = "okay"; > +}; > + > +&u2phy_host { > + status = "okay"; > +}; > + > +&u2phy_otg { > + status = "okay"; > +}; > + > +&uart2 { > + status = "okay"; > +}; > + > +&usb20_otg { > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&vop { > + status = "okay"; > +}; > + > +&vop_mmu { > + status = "okay"; > +}; > diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig > index d13a16902267..868ecb435691 100644 > --- a/arch/arm/mach-rockchip/rk3328/Kconfig > +++ b/arch/arm/mach-rockchip/rk3328/Kconfig > @@ -10,6 +10,13 @@ config TARGET_EVB_RK3328 > with full function and phisical connectors support like > usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial... > > +config TARGET_ROC_RK3328_CC > + bool "Firefly / Libre Computer ROC-RK3328-CC" > + select SPL_BOARD_INIT > + help > + ROC-RK3328-CC is a credit sized development board based on the > + RK3328 SoC. > + > endchoice > > config ROCKCHIP_BOOT_MODE_REG > @@ -40,5 +47,6 @@ config TPL_STACK > default 0xff098000 > > source "board/rockchip/evb_rk3328/Kconfig" > +source "board/firefly/roc-cc-rk3328/Kconfig" > > endif > diff --git a/board/firefly/roc-cc-rk3328/Kconfig b/board/firefly/roc-cc-rk3328/Kconfig > new file mode 100644 > index 000000000000..282aa28bfb4f > --- /dev/null > +++ b/board/firefly/roc-cc-rk3328/Kconfig > @@ -0,0 +1,24 @@ > +if TARGET_ROC_RK3328_CC > + > +# This target only requires SPL_BOARD_INIT for special handling of > +# pinmuxing in SPL, which is selected by TARGET_ROC_RK3328_CC. > +# The config is otherwise the same as evb_rk3328. > + > +# Follow existing naming convention for the board directory > +config SYS_BOARD > + default "roc-cc-rk3328" > + > +config SYS_VENDOR > + default "firefly" > + > +config SYS_CONFIG_NAME > + default "evb_rk3328" > + > +config BOARD_SPECIFIC_OPTIONS # dummy > + def_bool y > + > +# But use the proper name for SMBIOS tables > +config SMBIOS_PRODUCT_NAME > + default "roc-rk3328-cc" > + > +endif > diff --git a/board/firefly/roc-cc-rk3328/MAINTAINERS b/board/firefly/roc-cc-rk3328/MAINTAINERS > new file mode 100644 > index 000000000000..f2318e71ac33 > --- /dev/null > +++ b/board/firefly/roc-cc-rk3328/MAINTAINERS > @@ -0,0 +1,7 @@ > +ROC-RK3328-CC > +M: Loic Devulder > +M: Chen-Yu Tsai > +S: Maintained > +F: board/firefly/roc-cc-rk3328/ > +F: configs/roc-rk3328-cc_defconfig > +F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > diff --git a/board/firefly/roc-cc-rk3328/Makefile b/board/firefly/roc-cc-rk3328/Makefile > new file mode 100644 > index 000000000000..1550b5f5f16e > --- /dev/null > +++ b/board/firefly/roc-cc-rk3328/Makefile > @@ -0,0 +1 @@ > +obj-y := board.o > diff --git a/board/firefly/roc-cc-rk3328/board.c b/board/firefly/roc-cc-rk3328/board.c > new file mode 100644 > index 000000000000..eca58c86b53e > --- /dev/null > +++ b/board/firefly/roc-cc-rk3328/board.c > @@ -0,0 +1,38 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2020 Chen-Yu Tsai > + */ > +#include > + > +#include > +#include > + > +#if defined(CONFIG_SPL_BUILD) > + > +#define GRF_BASE 0xFF100000 > + > +enum { > + GPIO_0_D6_GPIO = 0 << 12, > + GPIO_0_D6_MASK = 0x3 << 12 > +}; > + > +/* > + * The ROC-RK3328-CC has the enable pin of the SD card power switch tied > + * to GPIO_0_D6. This pin also has the function SDMMC0_PWREN, which is > + * muxed by default. SDMMC0_PWREN is an active high signal controlled by > + * the MMC controller, however the switch enable is active low, and > + * pulled low (enabled) by default to make things work on boot. > + * > + * As such, we need to mux away from SDMMC0_PWREN and use GPIO to enable > + * power to the card. The default GPIO state for the pin is pull-down and > + * input, which doesn't require extra configuration when paired with the > + * external pull-down and active low switch. > + */ > +void spl_board_init(void) > +{ > + struct rk3328_grf_regs * const grf = (void *)GRF_BASE; > + > + rk_clrsetreg(&grf->gpio0d_iomux, GPIO_0_D6_MASK, GPIO_0_D6_GPIO); > +} > + > +#endif > diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig > new file mode 100644 > index 000000000000..047e323704ac > --- /dev/null > +++ b/configs/roc-cc-rk3328_defconfig > @@ -0,0 +1,97 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_SYS_TEXT_BASE=0x00200000 > +CONFIG_ENV_OFFSET=0x3F8000 > +CONFIG_ROCKCHIP_RK3328=y > +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_TPL_LIBCOMMON_SUPPORT=y > +CONFIG_TPL_LIBGENERIC_SUPPORT=y > +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y > +CONFIG_TARGET_ROC_RK3328_CC=y > +CONFIG_SPL_STACK_R_ADDR=0x600000 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_DEBUG_UART_BASE=0xFF130000 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_DEBUG_UART=y > +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 > +# CONFIG_ANDROID_BOOT_IMAGE is not set > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb" > +CONFIG_MISC_INIT_R=y > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +CONFIG_TPL_SYS_MALLOC_SIMPLE=y > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_ATF=y > +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y > +CONFIG_CMD_BOOTZ=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_TIME=y > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_TPL_OF_CONTROL=y > +CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" > +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > +CONFIG_TPL_OF_PLATDATA=y > +CONFIG_ENV_IS_IN_MMC=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_TPL_DM=y > +CONFIG_REGMAP=y > +CONFIG_SPL_REGMAP=y > +CONFIG_TPL_REGMAP=y > +CONFIG_SYSCON=y > +CONFIG_SPL_SYSCON=y > +CONFIG_TPL_SYSCON=y > +CONFIG_CLK=y > +CONFIG_SPL_CLK=y > +CONFIG_FASTBOOT_BUF_ADDR=0x800800 > +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_SF_DEFAULT_SPEED=20000000 > +CONFIG_PHY_REALTEK=y > +CONFIG_DM_ETH=y > +CONFIG_PHY_GIGE=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_GMAC_ROCKCHIP=y > +CONFIG_PHY=y > +CONFIG_PINCTRL=y > +CONFIG_SPL_PINCTRL=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_PWM=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_PWM_ROCKCHIP=y > +CONFIG_RAM=y > +CONFIG_SPL_RAM=y > +CONFIG_TPL_RAM=y > +CONFIG_DM_RESET=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_SYSRESET=y > +# CONFIG_TPL_SYSRESET is not set > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_GENERIC=y > +CONFIG_USB_OHCI_HCD=y > +CONFIG_USB_OHCI_GENERIC=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_DWC3=y > +# CONFIG_USB_DWC3_GADGET is not set > +CONFIG_USB_GADGET=y > +CONFIG_USB_GADGET_DWC2_OTG=y > +CONFIG_SPL_TINY_MEMSET=y > +CONFIG_TPL_TINY_MEMSET=y > +CONFIG_ERRNO_STR=y > diff --git a/doc/README.rockchip b/doc/README.rockchip > index 9b699b9ae5d3..01ee48df46e3 100644 > --- a/doc/README.rockchip > +++ b/doc/README.rockchip > @@ -52,10 +52,12 @@ Two RK3308 boards are supported: > - EVB RK3308 - use evb-rk3308 configuration > - ROC-CC-RK3308 - use roc-cc-rk3308 configuration > > -Two RK3328 board are supported: > +Three RK3328 board are supported: > > - EVB RK3328 - use evb-rk3328_defconfig > - Pine64 Rock64 board - use rock64-rk3328_defconfig > + - Firefly / Libre Computer Project ROC-RK3328-CC board - > + use roc-cc-rk3328_defconfig > > Size RK3399 boards are supported (aarch64): >