From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Thu, 22 Jan 2015 15:43:29 +0100 (CET) Received: from mailapp01.imgtec.com ([195.59.15.196]:57025 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27010483AbbAVOn1noPqW (ORCPT ); Thu, 22 Jan 2015 15:43:27 +0100 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id 136C06A2FF3AC; Thu, 22 Jan 2015 14:43:19 +0000 (GMT) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Thu, 22 Jan 2015 14:43:21 +0000 Received: from [192.168.154.96] (192.168.154.96) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Thu, 22 Jan 2015 14:43:20 +0000 Message-ID: <54C10C88.7060106@imgtec.com> Date: Thu, 22 Jan 2015 14:43:20 +0000 From: Markos Chandras User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: "Maciej W. Rozycki" CC: Subject: Re: [PATCH RFC v2 30/70] MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo References: <1421405389-15512-1-git-send-email-markos.chandras@imgtec.com> <1421405389-15512-31-git-send-email-markos.chandras@imgtec.com> <54BF709B.1080609@imgtec.com> In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit X-Originating-IP: [192.168.154.96] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 45431 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: Markos.Chandras@imgtec.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 01/22/2015 02:08 PM, Maciej W. Rozycki wrote: > On Wed, 21 Jan 2015, Markos Chandras wrote: > >>>> diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c >>>> index 097fc8d14e42..a8fdf9685cad 100644 >>>> --- a/arch/mips/kernel/proc.c >>>> +++ b/arch/mips/kernel/proc.c >>>> @@ -82,7 +82,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) >>>> seq_printf(m, "]\n"); >>>> } >>>> >>>> - seq_printf(m, "isa\t\t\t: mips1"); >>>> + seq_printf(m, "isa\t\t\t:"); >>>> + if (!cpu_has_mips_r6) >>>> + seq_printf(m, " mips1"); >>> >>> I think define `cpu_has_mips_r1' instead and use it here. It may turn >>> out needed elsewhere too. We probably don't need a new `MIPS_CPU_ISA_I' >>> bit at this stage so this could be: > > Typo here, I meant `cpu_has_mips_1' actually, sorry about that. > >> the change is simple enough and I see no reason to define the >> cpu_has_mips_r1 at the moment. If we ever need to explicitly handle r1, >> we can reconsider that. > > It's a matter of code clarity, good code is self-explanatory. Here the > intent is to print `mips1' if it is supported. By avoiding the extra > definition you're detaching the intent from what code says. Someone > reading this code (who may not necessarily know the architecture documents > by heart) has to scratch their head thinking: "why isn't `mips1' printed > for R6, what the former has to do with the latter, and why is this case > different to `mips2' and other ones that follow?" > > Whereas the intent is clear with this: > > #define cpu_has_mips_1 (!cpu_has_mips_r6) // Aha, `mips1' is there if no R6! > > if (cpu_has_mips_1) > seq_printf(m, " mips1"); // Well, this is obvious... however, someone may wonder then why not have if (cpu_has_mips_1) print mips1 if (cpu_has_mips_2) print mips2 if (cpu_has_mips_3) print mips3 and only care about mips1. > > Do you see what I mean? Do you agree now? the if (!cpu_has_mips_r6) seq_printf(m, " mips1"); means exactly the same thing with #define cpu_has_mips_1 (!cpu_has_mips_r6) // Aha, `mips1' is there if no R6! especially since this is the only place that is being used. I don't see how the differ. In any case, i don't want such details to block the patchset, so I will change it. -- markos From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:57025 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27010483AbbAVOn1noPqW (ORCPT ); Thu, 22 Jan 2015 15:43:27 +0100 Message-ID: <54C10C88.7060106@imgtec.com> Date: Thu, 22 Jan 2015 14:43:20 +0000 From: Markos Chandras MIME-Version: 1.0 Subject: Re: [PATCH RFC v2 30/70] MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo References: <1421405389-15512-1-git-send-email-markos.chandras@imgtec.com> <1421405389-15512-31-git-send-email-markos.chandras@imgtec.com> <54BF709B.1080609@imgtec.com> In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: "Maciej W. Rozycki" Cc: linux-mips@linux-mips.org Message-ID: <20150122144320.bp_0rVkEFuO1hawn-qiK6QzC1jUyQIYjpG7MOuazKbs@z> On 01/22/2015 02:08 PM, Maciej W. Rozycki wrote: > On Wed, 21 Jan 2015, Markos Chandras wrote: > >>>> diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c >>>> index 097fc8d14e42..a8fdf9685cad 100644 >>>> --- a/arch/mips/kernel/proc.c >>>> +++ b/arch/mips/kernel/proc.c >>>> @@ -82,7 +82,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) >>>> seq_printf(m, "]\n"); >>>> } >>>> >>>> - seq_printf(m, "isa\t\t\t: mips1"); >>>> + seq_printf(m, "isa\t\t\t:"); >>>> + if (!cpu_has_mips_r6) >>>> + seq_printf(m, " mips1"); >>> >>> I think define `cpu_has_mips_r1' instead and use it here. It may turn >>> out needed elsewhere too. We probably don't need a new `MIPS_CPU_ISA_I' >>> bit at this stage so this could be: > > Typo here, I meant `cpu_has_mips_1' actually, sorry about that. > >> the change is simple enough and I see no reason to define the >> cpu_has_mips_r1 at the moment. If we ever need to explicitly handle r1, >> we can reconsider that. > > It's a matter of code clarity, good code is self-explanatory. Here the > intent is to print `mips1' if it is supported. By avoiding the extra > definition you're detaching the intent from what code says. Someone > reading this code (who may not necessarily know the architecture documents > by heart) has to scratch their head thinking: "why isn't `mips1' printed > for R6, what the former has to do with the latter, and why is this case > different to `mips2' and other ones that follow?" > > Whereas the intent is clear with this: > > #define cpu_has_mips_1 (!cpu_has_mips_r6) // Aha, `mips1' is there if no R6! > > if (cpu_has_mips_1) > seq_printf(m, " mips1"); // Well, this is obvious... however, someone may wonder then why not have if (cpu_has_mips_1) print mips1 if (cpu_has_mips_2) print mips2 if (cpu_has_mips_3) print mips3 and only care about mips1. > > Do you see what I mean? Do you agree now? the if (!cpu_has_mips_r6) seq_printf(m, " mips1"); means exactly the same thing with #define cpu_has_mips_1 (!cpu_has_mips_r6) // Aha, `mips1' is there if no R6! especially since this is the only place that is being used. I don't see how the differ. In any case, i don't want such details to block the patchset, so I will change it. -- markos