From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758897AbbA3AuT (ORCPT ); Thu, 29 Jan 2015 19:50:19 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:23151 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752910AbbA3AuQ (ORCPT ); Thu, 29 Jan 2015 19:50:16 -0500 X-AuditID: cbfee690-f79ab6d0000046f7-d1-54cad5454d5a Message-id: <54CAD545.7090301@samsung.com> Date: Fri, 30 Jan 2015 09:50:13 +0900 From: Chanwoo Choi User-Agent: Mozilla/5.0 (X11; Linux i686; rv:17.0) Gecko/20130106 Thunderbird/17.0.2 MIME-version: 1.0 To: Sylwester Nawrocki Cc: Tomasz Figa , Mike Turquette , Kukjin Kim , "pankaj.dubey@samsung.com" , "inki.dae@samsung.com" , "chanho61.park@samsung.com" , Seung-Woo Kim , linux-samsung-soc , linux-kernel Subject: Re: [PATCH v3 01/12] clk: samsung: exynos5433: Add clocks using common clock framework References: <1421821618-8627-1-git-send-email-cw00.choi@samsung.com> <1421821618-8627-2-git-send-email-cw00.choi@samsung.com> <54C287A0.50407@samsung.com> <54CA2D3D.3070908@samsung.com> In-reply-to: <54CA2D3D.3070908@samsung.com> Content-type: text/plain; charset=UTF-8 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWyRsSkQNft6qkQg4XbWS0u79e2mHR/AotF /+PXzBaXd81hs5hxfh+TxdMJF9ksFm39wm5x+E07q8WMyS/ZLFbt+sPowOWxc9Zddo9NqzrZ PO5c28Pm0bdlFaPH501yAaxRXDYpqTmZZalF+nYJXBkv1u5kK9gsWPFv5W+WBsY1vF2MnBwS AiYS63ctY4KwxSQu3FvP1sXIxSEksJRRYk73Q1aYorstU5ghEosYJTZt74NyXjNKrDt1Dayd V0BLYte5H+wgNouAqsTHhUvB4mxA8f0vbrCB2KICYRIrp19hgagXlPgx+R6YLSKgL7Fk1UWw 1cwCy5klrm9uA0pwcAgLJErsXscFsayNSeLU5w+MIA2cAtoSh5d9ZAaxmQXUJSbNWwRly0ts XvMW7DoJgUfsElfPtEJdJCDxbfIhsKESArISmw4wQ7wmKXFwxQ2WCYxis5DcNAvJ2FlIxi5g ZF7FKJpakFxQnJReZKJXnJhbXJqXrpecn7uJERiXp/89m7CD8d4B60OMAhyMSjy8CY0nQ4RY E8uKK3MPMZoCXTGRWUo0OR8Y/Xkl8YbGZkYWpiamxkbmlmZK4ryvpX4GCwmkJ5akZqemFqQW xReV5qQWH2Jk4uCUamD0kRcoErsqzuD7sqNeU+wq1/nJZ598+Szwf236grP+xxtPbt/8/ce+ i2vsnbjvG4lzBc/5u+fR5vBtfZf6OWd2ZRiflLy/5ZPo+8Zitp/v4pYa/LMIsk9TW8D2Yw/f Jv2SHLMqp/CV5hsP3+WuWncpQu4r68bOCWtYksUzantvdZx9dPT+uwWTlViKMxINtZiLihMB UaJscMYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrLIsWRmVeSWpSXmKPExsVy+t9jAV3Xq6dCDH7es7S4vF/bYtL9CSwW /Y9fM1tc3jWHzWLG+X1MFk8nXGSzWLT1C7vF4TftrBYzJr9ks1i16w+jA5fHzll32T02repk 87hzbQ+bR9+WVYwenzfJBbBGNTDaZKQmpqQWKaTmJeenZOal2yp5B8c7x5uaGRjqGlpamCsp 5CXmptoqufgE6Lpl5gBdpaRQlphTChQKSCwuVtK3wzQhNMRN1wKmMULXNyQIrsfIAA0krGHM eLF2J1vBZsGKfyt/szQwruHtYuTkkBAwkbjbMoUZwhaTuHBvPVsXIxeHkMAiRolN2/uYIZzX jBLrTl1jAqniFdCS2HXuBzuIzSKgKvFx4VKwOBtQfP+LG2wgtqhAmMTK6VdYIOoFJX5Mvgdm iwjoSyxZdRFsA7PAcmaJ65vbgBIcHMICiRK713FBLGtjkjj1+QMjSAOngLbE4WUfwc5jFlCX mDRvEZQtL7F5zVvmCYwCs5DsmIWkbBaSsgWMzKsYRVMLkguKk9JzjfSKE3OLS/PS9ZLzczcx gqP+mfQOxlUNFocYBTgYlXh4ExpPhgixJpYVV+YeYpTgYFYS4dU/dipEiDclsbIqtSg/vqg0 J7X4EKMpMAgmMkuJJucDE1JeSbyhsYmZkaWRuaGFkbG5kjivkn1biJBAemJJanZqakFqEUwf EwenVANjdQvHjGz3Fp7K5IWizS5nbR6ZeDPk1NwylJhd6LqgyyzDMYo5jSW9/VfS7FsbhLcI RsxhWmUi5B4k0HZZeqVfqKie4MbGH/53y1dl+H7sedfv+dRk8qN1KlUyzx5Hf5RfdHvvv0M3 Qvh/vuVsebTReJmOa8e3C2ZLuWY8tWY6d16w+mtgbbESS3FGoqEWc1FxIgDE0itFEAMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sylwester, On 01/29/2015 09:53 PM, Sylwester Nawrocki wrote: > Hi Chanwoo, > > On 23/01/15 21:54, Chanwoo Choi wrote: >> On Sat, Jan 24, 2015 at 2:40 AM, Sylwester Nawrocki >> wrote: >>> On 21/01/15 07:26, Chanwoo Choi wrote: >>>> +/* list of all parent clock list */ >>> >>>> +PNAME(mout_bus_pll_user_p) = { "fin_pll", "sclk_bus_pll", }; >>> ... >>>> + >>>> +static struct samsung_mux_clock top_mux_clks[] __initdata = { >>> >>>> + MUX(CLK_MOUT_BUS_PLL_USER, "mout_bus_pll_user", mout_bus_pll_user_p, >>>> + MUX_SEL_TOP1, 0, 1), >>> ... >>>> +}; >>>> + >>>> +static struct samsung_div_clock top_div_clks[] __initdata = { >>> ... >>>> + /* DIV_TOP3 */ >>>> + DIV(CLK_DIV_ACLK_IMEM_SSSX_266, "div_aclk_imem_sssx_266", >>>> + "mout_bus_pll_user", DIV_TOP3, 24, 3), >>> >>> Shouldn't "fin_pll" be renamed to "oscclk" ? In the documentation >>> the root clock (from XXTI input pin) seems to be referred as OSCCLK. >>> And I can't see "fin_pll" clock registered anywhere. Shouldn't there >>> be a "fixed-rate-clock" as a parent of at least CMU_TOP? e.g. >> >> Right, >> I added "fin_pll" fixed clock in DT as following: >> When I registered "fin_pll" fixed clock, I could use "fin_pll" clock >> for exynos5433 cmu without adding additional dt node. >> >> fin_pll: xxti { >> compatible = "fixed-clock"; >> clock-output-names = "fin_pll"; >> #clock-cells = <0>; >> }; >> >> I'll add the example of "fin_pll" dt node to documentation for exynos5433 cmu. > > OK, thanks. But I think it needs to be named "oscclk", FIN_PLL is almost > not existent in the SoC's documentation. > I'd suggest to define the root oscillator clock (XXTI/OSCCLK) as "oscclk" > in DT, rather than registering "fin_pll" fixed clock in the driver. OK, I'll fix it by using "oscclk" clock name instead of "fin_pll". > >>> xxti: xxti { >>> compatible = "fixed-clock"; >>> #clock-cells = <0>; >>> clock-output-names = "oscclk"; >>> clock-frequency = <24000000>; >>> }; >>> >>> &cmu_top { >>> clocks = <&xxti>; >>> }; Best Regards, Chanwoo Choi