From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: Re: [PATCH v2] x86: re-order struct arch_domain fields Date: Tue, 10 Feb 2015 11:53:42 +0000 Message-ID: <54D9F146.3040308@citrix.com> References: <54D9FACC020000780005E907@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YL9Nz-0003LQ-Gz for xen-devel@lists.xenproject.org; Tue, 10 Feb 2015 11:53:47 +0000 In-Reply-To: <54D9FACC020000780005E907@mail.emea.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , xen-devel Cc: Keir Fraser List-Id: xen-devel@lists.xenproject.org On 10/02/15 11:34, Jan Beulich wrote: > ... to reduce padding holes. > > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper > --- > v2: Drop vtsc_usercount movement to struct pv_domain. > > --- a/xen/include/asm-x86/domain.h > +++ b/xen/include/asm-x86/domain.h > @@ -255,13 +255,16 @@ struct arch_domain > > unsigned int hv_compat_vstart; > > - bool_t s3_integrity; > + /* Maximum physical-address bitwidth supported by this guest. */ > + unsigned int physaddr_bitsize; > > /* I/O-port admin-specified access capabilities. */ > struct rangeset *ioport_caps; > uint32_t pci_cf8; > uint8_t cmos_idx; > > + bool_t s3_integrity; > + > struct list_head pdev_list; > > union { > @@ -275,6 +278,18 @@ struct arch_domain > * page_alloc lock */ > int page_alloc_unlock_level; > > + /* Continuable domain_relinquish_resources(). */ > + enum { > + RELMEM_not_started, > + RELMEM_shared, > + RELMEM_xen, > + RELMEM_l4, > + RELMEM_l3, > + RELMEM_l2, > + RELMEM_done, > + } relmem; > + struct page_list_head relmem_list; > + > /* nestedhvm: translate l2 guest physical to host physical */ > struct p2m_domain *nested_p2m[MAX_NESTEDP2M]; > mm_lock_t nested_p2m_lock; > @@ -282,27 +297,16 @@ struct arch_domain > /* NB. protected by d->event_lock and by irq_desc[irq].lock */ > struct radix_tree_root irq_pirq; > > - /* Maximum physical-address bitwidth supported by this guest. */ > - unsigned int physaddr_bitsize; > - > /* Is a 32-bit PV (non-HVM) guest? */ > bool_t is_32bit_pv; > /* Is shared-info page in 32-bit format? */ > bool_t has_32bit_shinfo; > + > /* Domain cannot handle spurious page faults? */ > bool_t suppress_spurious_page_faults; > > - /* Continuable domain_relinquish_resources(). */ > - enum { > - RELMEM_not_started, > - RELMEM_shared, > - RELMEM_xen, > - RELMEM_l4, > - RELMEM_l3, > - RELMEM_l2, > - RELMEM_done, > - } relmem; > - struct page_list_head relmem_list; > + /* Is PHYSDEVOP_eoi to automatically unmask the event channel? */ > + bool_t auto_unmask; > > cpuid_input_t *cpuids; > > @@ -329,15 +333,12 @@ struct arch_domain > struct e820entry *e820; > unsigned int nr_e820; > > - /* set auto_unmask to 1 if you want PHYSDEVOP_eoi to automatically > - * unmask the event channel */ > - bool_t auto_unmask; > + unsigned int psr_rmid; /* RMID assigned to the domain for CMT */ > + > /* Shared page for notifying that explicit PIRQ EOI is required. */ > unsigned long *pirq_eoi_map; > unsigned long pirq_eoi_map_mfn; > - > - unsigned int psr_rmid; /* RMID assigned to the domain for CMT */ > -} __cacheline_aligned; > +}; > > #define has_arch_pdevs(d) (!list_empty(&(d)->arch.pdev_list)) > > @@ -493,7 +494,7 @@ struct arch_vcpu > unsigned long eip; > } mem_event; > > -} __cacheline_aligned; > +}; > > smap_check_policy_t smap_policy_change(struct vcpu *v, > smap_check_policy_t new_policy); > > >