From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753492AbbBJUvJ (ORCPT ); Tue, 10 Feb 2015 15:51:09 -0500 Received: from mga11.intel.com ([192.55.52.93]:48558 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752088AbbBJUvH (ORCPT ); Tue, 10 Feb 2015 15:51:07 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,552,1418112000"; d="scan'208";a="525577697" Message-ID: <54DA6F38.4050902@intel.com> Date: Tue, 10 Feb 2015 12:51:04 -0800 From: Dave Hansen User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Toshi Kani CC: akpm@linux-foundation.org, hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com, arnd@arndb.de, linux-mm@kvack.org, x86@kernel.org, linux-kernel@vger.kernel.org, Elliott@hp.com Subject: Re: [PATCH v2 5/7] x86, mm: Support huge KVA mappings on x86 References: <1423521935-17454-1-git-send-email-toshi.kani@hp.com> <1423521935-17454-6-git-send-email-toshi.kani@hp.com> <54DA54FA.7010707@intel.com> <1423600952.1128.9.camel@misato.fc.hp.com> In-Reply-To: <1423600952.1128.9.camel@misato.fc.hp.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/10/2015 12:42 PM, Toshi Kani wrote: > On Tue, 2015-02-10 at 10:59 -0800, Dave Hansen wrote: >> On 02/09/2015 02:45 PM, Toshi Kani wrote: >>> Implement huge KVA mapping interfaces on x86. Select >>> HAVE_ARCH_HUGE_VMAP when X86_64 or X86_32 with X86_PAE is set. >>> Without X86_PAE set, the X86_32 kernel has the 2-level page >>> tables and cannot provide the huge KVA mappings. >> >> Not that it's a big deal, but what's the limitation with the 2-level >> page tables on 32-bit? We have a 4MB large page size available there >> and we already use it for the kernel linear mapping. > > ioremap() calls arch-neutral ioremap_page_range() to set up I/O mappings > with PTEs. This patch-set enables ioremap_page_range() to set up PUD & > PMD mappings. With 2-level page table, I do not think this PUD/PMD > mapping code works unless we add some special code. What actually breaks, though? Can't you just disable the pud code via ioremap_pud_enabled()? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pd0-f178.google.com (mail-pd0-f178.google.com [209.85.192.178]) by kanga.kvack.org (Postfix) with ESMTP id C0F796B0032 for ; Tue, 10 Feb 2015 15:51:15 -0500 (EST) Received: by pdno5 with SMTP id o5so19319076pdn.8 for ; Tue, 10 Feb 2015 12:51:15 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com. [192.55.52.88]) by mx.google.com with ESMTP id gz1si28102151pbd.38.2015.02.10.12.51.14 for ; Tue, 10 Feb 2015 12:51:15 -0800 (PST) Message-ID: <54DA6F38.4050902@intel.com> Date: Tue, 10 Feb 2015 12:51:04 -0800 From: Dave Hansen MIME-Version: 1.0 Subject: Re: [PATCH v2 5/7] x86, mm: Support huge KVA mappings on x86 References: <1423521935-17454-1-git-send-email-toshi.kani@hp.com> <1423521935-17454-6-git-send-email-toshi.kani@hp.com> <54DA54FA.7010707@intel.com> <1423600952.1128.9.camel@misato.fc.hp.com> In-Reply-To: <1423600952.1128.9.camel@misato.fc.hp.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Sender: owner-linux-mm@kvack.org List-ID: To: Toshi Kani Cc: akpm@linux-foundation.org, hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com, arnd@arndb.de, linux-mm@kvack.org, x86@kernel.org, linux-kernel@vger.kernel.org, Elliott@hp.com On 02/10/2015 12:42 PM, Toshi Kani wrote: > On Tue, 2015-02-10 at 10:59 -0800, Dave Hansen wrote: >> On 02/09/2015 02:45 PM, Toshi Kani wrote: >>> Implement huge KVA mapping interfaces on x86. Select >>> HAVE_ARCH_HUGE_VMAP when X86_64 or X86_32 with X86_PAE is set. >>> Without X86_PAE set, the X86_32 kernel has the 2-level page >>> tables and cannot provide the huge KVA mappings. >> >> Not that it's a big deal, but what's the limitation with the 2-level >> page tables on 32-bit? We have a 4MB large page size available there >> and we already use it for the kernel linear mapping. > > ioremap() calls arch-neutral ioremap_page_range() to set up I/O mappings > with PTEs. This patch-set enables ioremap_page_range() to set up PUD & > PMD mappings. With 2-level page table, I do not think this PUD/PMD > mapping code works unless we add some special code. What actually breaks, though? Can't you just disable the pud code via ioremap_pud_enabled()? -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org