From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48822) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOMNw-0003UK-Vo for qemu-devel@nongnu.org; Thu, 19 Feb 2015 03:23:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOMNt-0000Lh-Q5 for qemu-devel@nongnu.org; Thu, 19 Feb 2015 03:23:00 -0500 Received: from mail-pd0-f170.google.com ([209.85.192.170]:38940) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOMNt-0000L8-KK for qemu-devel@nongnu.org; Thu, 19 Feb 2015 03:22:57 -0500 Received: by pdjy10 with SMTP id y10so7293924pdj.6 for ; Thu, 19 Feb 2015 00:22:56 -0800 (PST) Message-ID: <54E59D47.7090008@linaro.org> Date: Thu, 19 Feb 2015 16:22:31 +0800 From: Hanjun Guo MIME-Version: 1.0 References: <1424167806-8372-1-git-send-email-zhaoshenglong@huawei.com> <1424167806-8372-6-git-send-email-zhaoshenglong@huawei.com> <54E4CFCF.5060408@suse.de> <20150218205157.0fa2ef91@igors-macbook-pro.local> In-Reply-To: <20150218205157.0fa2ef91@igors-macbook-pro.local> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC PATCH 5/7] target-arm/cpu: Add apic_id property for ARMCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov , Shannon Zhao Cc: peter.maydell@linaro.org, hangaohuai@huawei.com, mst@redhat.com, a.spyridakis@virtualopensystems.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, peter.huangpeng@huawei.com, wanghaibin.wang@huawei.com, pbonzini@redhat.com, lersek@redhat.com, =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= , christoffer.dall@linaro.org On 2015年02月19日 03:51, Igor Mammedov wrote: > On Wed, 18 Feb 2015 18:45:51 +0100 > Andreas Färber wrote: > >> Hi, >> >> Am 17.02.2015 um 11:10 schrieb Shannon Zhao: >>> Add apic_id property for ARMCPU. It can be used for cpu hotplug. >>> >>> Signed-off-by: Shannon Zhao >>> --- >>> target-arm/cpu-qom.h | 1 + >>> target-arm/cpu.c | 77 >>> ++++++++++++++++++++++++++++++++++++++++++++++++++ >>> target-arm/cpu.h | 2 + 3 files changed, 80 insertions(+), 0 >>> deletions(-) >>> >>> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h >>> index ed5a644..d4560e2 100644 >>> --- a/target-arm/cpu-qom.h >>> +++ b/target-arm/cpu-qom.h >>> @@ -59,6 +59,7 @@ typedef struct ARMCPU { >>> /*< public >*/ >>> >>> CPUARMState env; >>> + uint32_t apic_id; >> >> Can you add a matching @apic_id: documentation entry above the struct? >> >>> >>> /* Coprocessor information */ >>> GHashTable *cp_regs; >>> diff --git a/target-arm/cpu.c b/target-arm/cpu.c >>> index 285947f..9202b07 100644 >>> --- a/target-arm/cpu.c >>> +++ b/target-arm/cpu.c >> [...] >>> @@ -343,6 +407,11 @@ static void arm_cpu_initfn(Object *obj) >>> cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, >>> g_free, g_free); >>> >>> + object_property_add(obj, "apic-id", "int", >>> + arm_cpuid_get_apic_id, >>> + arm_cpuid_set_apic_id, NULL, NULL, NULL); >> >> The property is correctly called apic-id. Please update the commit >> message, which has it as apic_id (2x). > Is there such thing as apic-id on ARM? Not apic-id, apic-id is x86 and ia64 dependent. On ARM, mpidr is similar as apic-id to represent the CPU hardware ID, so I think mpidr will be the one used in this patch, and another thing need to consider that mpidr on ARM64 is 64 bits, not uint32_t. Thanks Hanjun