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From: Jan Kiszka <jan.kiszka@siemens.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 02/14] ARM: Factor out armv7_get_cpu_id macro
Date: Mon, 02 Mar 2015 10:40:08 +0100	[thread overview]
Message-ID: <54F42FF8.7010501@siemens.com> (raw)
In-Reply-To: <20150228135658.5c1ac8c1@arm.com>

On 2015-02-28 14:56, Marc Zyngier wrote:
> On Fri, 27 Feb 2015 13:28:01 +0000
> Jan Kiszka <jan.kiszka@siemens.com> wrote:
> 
>> Handy for obtaining the ID of the current CPU. We will have more use
>> cases.
>>
>> CC: Marc Zyngier <marc.zyngier@arm.com>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>>  arch/arm/cpu/armv7/sunxi/psci.S | 4 ++--
>>  arch/arm/include/asm/macro.h    | 7 +++++++
>>  2 files changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/sunxi/psci.S
>> b/arch/arm/cpu/armv7/sunxi/psci.S index 9e898f2..0523217 100644
>> --- a/arch/arm/cpu/armv7/sunxi/psci.S
>> +++ b/arch/arm/cpu/armv7/sunxi/psci.S
>> @@ -19,6 +19,7 @@
>>  
>>  #include <config.h>
>>  #include <asm/gic.h>
>> +#include <asm/macro.h>
>>  #include <asm/psci.h>
>>  #include <asm/arch/cpu.h>
>>  
>> @@ -315,8 +316,7 @@ psci_arch_init:
>>  	mcr	p15, 0, r5, c1, c1, 0	@ Write SCR
>>  	isb
>>  
>> -	mrc	p15, 0, r4, c0, c0, 5	@ MPIDR
>> -	and	r4, r4, #3		@ cpu number in cluster
>> +	armv7_get_cpu_id r4
>>  	mov	r5, #0x400		@ 1kB of stack per CPU
>>  	mul	r4, r4, r5
>>  
>> diff --git a/arch/arm/include/asm/macro.h
>> b/arch/arm/include/asm/macro.h index 1c8c425..0bc925a 100644
>> --- a/arch/arm/include/asm/macro.h
>> +++ b/arch/arm/include/asm/macro.h
>> @@ -198,6 +198,13 @@ lr	.req	x30
>>  .endm
>>  #endif
>>  
>> +#else /* !CONFIG_ARM64 */
>> +
>> +.macro armv7_get_cpu_id rn
>> +	mrc	p15, 0, \rn, c0, c0, 5	/* read MPIDR */
>> +	and	\rn, \rn, #0xff		/* return CPU ID
>> in cluster */
>> +.endm
>> +
> 
> How does this work in a multi-cluster situation? Or when you have
> sparse MPIDRs?

I have no idea. That masking was stolen from your code.

The model we assume for PSCI is that there is no cluster and that we
have enough per-cpu space for up to the maximum cpu ID obtained that way.

If you are concerned about signaling a false general applicability of
that macro, I can fold it back into the callers or add some comments
about restrictions. My plan was just to make the caller site a bit more
readable.

Jan

-- 
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux

  reply	other threads:[~2015-03-02  9:40 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-27 13:27 [U-Boot] [PATCH v4 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 01/14] sun7i: Remove duplicate call to psci_arch_init Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 02/14] ARM: Factor out armv7_get_cpu_id macro Jan Kiszka
2015-02-28 13:56   ` Marc Zyngier
2015-03-02  9:40     ` Jan Kiszka [this message]
2015-03-02 10:19       ` Marc Zyngier
2015-03-02 12:14         ` Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 03/14] ARM: Factor out reusable psci_cpu_off_common Jan Kiszka
2015-02-28 13:55   ` Marc Zyngier
2015-02-27 13:28 ` [U-Boot] [PATCH v4 04/14] ARM: Factor out reusable psci_cpu_entry Jan Kiszka
2015-02-28 13:53   ` Marc Zyngier
2015-03-01  9:16     ` Ian Campbell
2015-02-27 13:28 ` [U-Boot] [PATCH v4 05/14] ARM: Factor out reusable psci_get_cpu_stack_top Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 06/14] ARM: Put target PC for PSCI CPU_ON on per-CPU stack Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 07/14] tegra124: Add more registers to struct mc_ctlr Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 08/14] virt-dt: Allow reservation of secure region when in a RAM carveout Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 09/14] tegra: Make tegra_powergate_power_on public Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 10/14] tegra: Add ap_pm_init hook Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 11/14] tegra124: Add PSCI support for Tegra124 Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 12/14] jetson-tk1: Add PSCI configuration options and reserve secure code Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 13/14] tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 Jan Kiszka
2015-02-27 13:28 ` [U-Boot] [PATCH v4 14/14] tegra: Set CNTFRQ for secondary CPUs Jan Kiszka
2015-03-08 20:08 ` [U-Boot] [PATCH v4 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix Ian Campbell
2015-03-09  6:52   ` Jan Kiszka

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