From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH 0/2] x86/vMSI-X: table read/write emulation adjustments Date: Fri, 20 Mar 2015 15:52:53 +0000 Message-ID: <550C5065020000780006C27E@mail.emea.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YYzED-0006hg-Sq for xen-devel@lists.xenproject.org; Fri, 20 Mar 2015 15:52:53 +0000 Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel Cc: Andrew Cooper , Keir Fraser List-Id: xen-devel@lists.xenproject.org Due to the (late) point in time when qemu requests the hypervisor to set up MSI-X interrupts (which is where the MMIO intercept gets put in place), the hypervisor doesn't see all guest writes, and hence shouldn't make assumptions on the state the virtual MSI-X resources are in. 1: honor all mask requests 2: add valid bits for read acceleration Signed-off-by: Jan Beulich